ConfigSoftSwitches() question

Hello!

I want to ask a question about ConfigSoftSwitches() function.

I'm using a custom board with ADSP BF-609 processor.  You may find ConfigSoftSwitches() function in  lwip_sysboot_task() when you add lwip add-in to the project.

ConfigSoftSwitches() operates with array of structures SOFT_SWITCH types. Each SOFT_SWITCH cell contains field HardwareAddress and this values hardcoded for each cell. In my case this is 0x21, 0x22, 0x23, see code below.

static SOFT_SWITCH SoftSwitch[] =
{
  {
    0u,
    0x21u,
    sizeof(SwitchConfig0)/sizeof(SWITCH_CONFIG),
    SwitchConfig0
  },
  {
    0u,
    0x22u,
    sizeof(SwitchConfig1)/sizeof(SWITCH_CONFIG),
    SwitchConfig1
  },
#if defined(__ADSPBF609__)
  {
    0u,
    0x23u,
    sizeof(SwitchConfig2)/sizeof(SWITCH_CONFIG),
    SwitchConfig2
  },
#endif
};

My first question is why this thing uses 0x21, 0x22, 0x23 values? Is there anywhere information about this hardware addresses and matches with hardware that was be used on the board?

I didn't find information about this moment in hardware references.

Also each SoftSwitch[0], SoftSwitch[1], SoftSwitch[2] contains field SwitchConfig0, SwitchConfig1, SwitchConfig2 correspondingly.

For SwitchConfigs I can see next definitions:

static SWITCH_CONFIG SwitchConfig0[] =
{
/*
            U45 Port A                                  U45 Port B

    7--------------- RMII_CLK_EN        |       7--------------- ~TEMP_THERM_EN
    | 6------------- ~CNT0ZM_EN         |       | 6------------- ~TEMP_IRQ_EN
    | | 5----------- ~CNT0DG_EN         |       | | 5----------- ~UART0CTS_146_EN
    | | | 4--------- ~CNT0UD_EN         |       | | | 4--------- ~UART0CTS_RST_EN
    | | | | 3------- ~CAN0RX_EN         |       | | | | 3------- ~UART0CTS_RTS_LPBK
    | | | | | 2----- ~CAN0_ERR_EN       |       | | | | | 2----- ~UART0CTS_EN
    | | | | | | 1--- ~CAN_STB           |       | | | | | | 1--- ~UART0RX_EN
    | | | | | | | 0- CAN_EN             |       | | | | | | | 0- ~UART0RTS_EN
    | | | | | | | |                     |       | | | | | | | |
    N Y Y Y Y N N Y                     |       N N N N N N Y Y     ( Active Y or N )
    1 0 0 0 0 1 1 1                     |       1 1 1 1 1 1 0 0     ( value being set )
*/

  { 0x12u, 0x87u },                          { 0x13u, 0xFCu },

  /* specify inputs/outputs */
  { 0x0u, 0x0u },
  { 0x1u, 0x0u },
};
/* switch 1 register settings */
static SWITCH_CONFIG SwitchConfig1[] =
{
/*
            U46 Port A                                  U46 Port B

    7--------------- ~LED4_GPIO_EN          |       7--------------- EMPTY
    | 6------------- ~LED3_GPIO_EN          |       | 6------------- ~SPI0D3_EN
    | | 5----------- ~LED2_GPIO_EN          |       | | 5----------- ~SPI0D2_EN
    | | | 4--------- ~LED1_GPIO_EN          |       | | | 4--------- ~SPIFLASH_CS_EN
    | | | | 3------- SMC0_LP0_EN            |       | | | | 3------- ~SD_WP_EN
    | | | | | 2----- EMPTY                  |       | | | | | 2----- ~SD_CD_EN
    | | | | | | 1--- SMC0_EPPI2_LP1_SWITCH  |       | | | | | | 1--- ~PUSHBUTTON2_EN
    | | | | | | | 0- OVERRIDE_SMC0_LP0_BOOT |       | | | | | | | 0- ~PUSHBUTTON1_EN
    | | | | | | | |                         |       | | | | | | | |
    Y Y Y Y Y X Y Y                         |       X Y Y Y Y Y Y Y     ( Active Y or N )
    0 0 0 0 1 X 1 0                         |       X 0 0 0 0 0 0 0     ( value being set )
*/
  { 0x12u, 0xAu },                                  { 0x13u, 0x0u },

  /* specify inputs/outputs */
  { 0x0u, 0x0u },
  { 0x1u, 0x0u },
};
/* switch 2 register settings */
static SWITCH_CONFIG SwitchConfig2[] =
{
/*
            U47 Port A                                                  U47 Port B

    7--------------- ~PD2_SPI0MISO_EI3_EN                   |       7--------------- EMPTY
    | 6------------- ~PD1_SPI0D3_EPPI1D17_SPI0SEL2_EI3_EN   |       | 6------------- EMPTY
    | | 5----------- ~PD0_SPI0D2_EPPI1D16_SPI0SEL3_EI3_EN   |       | | 5----------- EMPTY
    | | | 4--------- ~WAKE_PUSHBUTTON_EN                    |       | | | 4--------- EMPTY
    | | | | 3------- ~ETHERNET_EN                           |       | | | | 3------- EMPTY
    | | | | | 2----- PHYAD0                                 |       | | | | | 2----- EMPTY
    | | | | | | 1--- PHY_PWR_DWN_INT                        |       | | | | | | 1--- ~PD4_SPI0CK_EI3_EN
    | | | | | | | 0- ~PHYINT_EN                             |       | | | | | | | 0- ~PD3_SPI0MOSI_EI3_EN
    | | | | | | | |                                         |       | | | | | | | |
    N N N N Y N N Y                                         |       X X X X X X N N     ( Active Y or N )
    1 1 1 1 0 0 0 0                                         |       X X X X X X 1 1     ( value being set )
*/
 { 0x12u, 0xF0u },                                                 { 0x13u, 0x3u },

 /* specify inputs/outputs */
  { 0x0u, 0x6u },
  { 0x1u, 0x0u },
};

Structure SWITCH_CONFIG contains fields Register and Value. My second question is why here are used only  0x0u, 0x1u, 0x12u, 0x13u values for Register fields and which number matches with real register name (for example, pREG_DMA33_CFG or maybe another name)? Maybe there is table with coincidence such values and registers names and registers description.

Thanks!

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