Debugging a 3-core project on SC58x (such as ADZS-SC589-EZLITE dev board), CCES doesn't automatically shift breakpoint focus to Core 2 after Cores 0 and 1 are started.

This issue is just a very small inconvenience problem,  but I'd like to ask anyway.

When I debug a 3-core project on ADZS-SC589-EZLITE development board,  such as the "ThreeCore_SC589" example included in the dev board support package,  CCES first loads executable code in memory then hits the automatic/default breakpoint in first statement of main() in the Core 0 project.  The focus in the Debug window is automatically on that breakpoint so that I can simply press the F5 key or click the resume button on the toolbar to start Core 0 running:


After I press the F5 key, Core 0 starts running and the automatic/default breakpoint for Core 1 main() function is hit.  The focus in the Debug window automatically shifts to this breakpoint and I can can simply press the F5 key or click the resume button on the toolbar to start Core 1 running:


After I press the F5 key,  Core 1 starts running, however the focus in the Debug window does not automatically shift to the Core 2 breakpoint,  Core 1 remains highlighted:


Now I am unable to simply press F5 key to start Core 2 running - I must use the mouse to click on Core 2 in the Debug window (highlight Core 2) and then I can use F5 or the Resume button to start Core 2 running.

My question:  Why doesn't CCES automatically shift its breakpoint focus to Core 2 after I start Core 1?  Is there some setting adjustment which will change CCES behavior to automatically shift focus to Core 2 in the situation described above?

I know this is a very small issue - but sitting at a lab bench all day starting many many debug sessions,  it starts to become annoying.

Thanks in advance for your help!


  • +1
    •  Analog Employees 
    on Nov 13, 2019 1:11 PM 11 months ago

    As you mentioned CCES doesn't automatically shift focus from core1 to core2 because, sharc1 core is not enabled(adi_core_enable(ADI_CORE_SHARC1)) in the Threecore_core1 project. Therefore, you can try to enable sharc1 core in the Threecore_core1 project.

    Please add the below line in the Threecore_core1.c file project to enable sharc1 core and remove the line from Core0 in main(). Refer attached screenshot.

    When the processor starts execution, the SHARC+ cores are held in IDLE until enabled by the application running on the ARM core. This means:
    *If the application running on core 0 does not explicitly enable the other cores, the SHARC+ cores will not run their applications.
    *When the application is loaded into the processor using the debugger and run to the start of main() on core 0, the other cores will still be in IDLE.
    *The run-time libraries include the adi_core_enable() function to release other cores from IDLE.

    You can also refer the below FAQ for more details.
    FAQ: Can't debug ADSP-SC589 examples.

    Also please refer the attached document to know more details about Debugging on ADSP-SC58x.

  • Hi Nishanthi,

    Your suggestion works great - thanks very much!


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