How to create a CCES debug configuration to debug SC573 Core1 and Core2 without disrupting Core0?

I can't seem to find a way to create a CCES v2.8.1 for Windows Debug Configuration that will allow me to debug SC573 Core1 and Core2 SHARC code without halting the Linux code running on Core0.

If I create a brand new CCES project called, for example, BlinkLED to have both SHARC Core1 & Core2 blink an LED on the ADSP-SC573 EZ-Kit, CCES asks me which cores will be involved in this project. I skip the ARM Core0 because it doesn't support the Linux Toolchain, only the Bare-Metal Toolchain, which is not my case because my ARM Core0 code was built outside CCES using my Linux development host's Linux Toolchain with its 'make' command and the Linux Add-In v1.2.0 for CCES Buildroot configuration & code I customized. 

I select Core1 and Core2 because that's the only code CCES for Windows can handle in my situation & that's the code I want to debug. It creates the projects (ex: BlinkLED_Core1 and BlinkLED_Core2) and all that builds fine. Now, I want to debug it, so I need to configure a new Debug Configuration, and that's where I never get the Debug button at the bottom right of that window to become available (i.e. not be grayed-out) to start debugging, even with BlinkLED_Core1.dxe and BlinkLED_Core2.dxe under their respective Device [Core N] headings.  CCES is forecing me to <Click here to select a program to load> under the Device [Core 0] heading, which it will load over the running Linux system on the ARM Core0.  I need a way to remove Device [Core 0] heading completely from the Debug Configuration, don't I?   If it's not going to be intuitive, where is this documented at least?