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SigmaDSP Processors & SigmaStudio Dev. Tool
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Documents SigmaDSP PCB Layout Best Practices
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  • +AD193x: FAQ
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  • -SigmaDSP: FAQ
    • Booting a SigmaDSP from a microcontroller with no C compiler
    • Calculating Filter Coefficients to Store in a Microcontroller
    • Can I program multiple SigmaDSPs in parallel using one USBi?
    • Can I use SigmaDSP to decode MP3/WAV/AAC?
    • Can SigmaDSP do frequency-domain processing like FFT or pitch shift?
    • Creating a delay after startup
    • FAQ: Can I write C or assembly code for SigmaDSP in SigmaStudio?
    • FAQ: Can we bundle SigmaStudio with our product design?
    • FAQ: Developing custom algorithms and/or using 3rd party algorithms
    • FAQ: How can I estimate MIPS/Memory resource on SigmaDSP?
    • FAQ: What types of capacitors are good to use in the analog audio signal path?
    • FAQ:  Which SigmaDSP ICs support selfbooting from an EEPROM?
    • FAQ:  Why isn't a software/documentation CD included with my evaluation board?
    • How do I create the microcontroller code to interface to my SigmaDSP?
    • How do I start a timer after power-on, or when the input signal goes away?
    • How many instructions can be executed per sample in SigmaDSP?
    • Memory requirements for booting a SigmaDSP with a microcontroller
    • Monitoring average and instantaneous signal levels
    • Playing audio samples in SigmaDSP
    • SigmaDSP PCB Layout Best Practices
    • SigmaDSP Products and Evaluation Boards - ROHS and REACH Compliance
    • SigmaStudio 3.4 Released
    • Updating SigmaDSP Parameter with a Microcontroller
    • Using two SigmaDSP evaluation boards simultaneously with one USBi board
    • Welcome to the SIGMADSP Processors and SIGMASTUDIO Development tool community
    • What are the number formats for SigmaDSP?
    • What is the step size for audio delay in a SigmaDSP?
    • Where can I buy a SigmaDSP Evaluation Board or USBi (EVAL-ADUSB2EBZ)?
    • Which SPI Mode is used by SigmaDSP Devices?
  • +SigmaStudio: FAQ
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SigmaDSP PCB Layout Best Practices

Good layout practices are of key importance when designing SigmaDSP system PCBs.

  • First of all, a solid ground plane is a necessity in order to  maintain signal integrity and minimize EMI radiation. If you have two  ground planes, I would recommend using stitching vias spead evenly  throughout the board in order to connect them.
  • Power supply high frequency decoupling capacitors should be placed  as close as possible to the respective power and ground pins, on the  same side of the board as the SigmaDSP IC. There should be no vias  between the pins and the decoupling caps. Please see the following excerpts from the ADAU144x datasheet for more detail.

  • Typically, we use a single 100 nF capacitor for each power-ground  pin pair. However, if there is excessive high frequency noise in the  system, an additional 10 nF capacitor can be used in parallel. In that  case, the 10 nF capacitor should be closest, and the thermal connections  should be on the far side of the 100 nF capacitor.

  • 10 uF capacitors should be used for each named supply (DVDD, AVDD,  IOVDD, etc) in order to provide a current reservoir in case of sudden  current spikes.

  • If ferrite beads are desired for supply isolation, the beads should always be placed outside of the local high frequency decoupling capacitors, like in the following diagram. If the ferrite beads are instead placed between the supply pin and the decoupling capcitor, high frequency noise will be reflected back into the IC since it does not have a suitable return path to ground, and this will increase EMI and create noisy supplies.

  • The proximity of components to the IC is important. Here is my  suggested order of priority which should be followed when placing components. The  top of the list begins with the components that should be placed closest to the IC (those in bold have highest priority), and the bottom of the list has the components that can (if absolutely necessary) be placed further away.
    • 10 nF high frequency decoupling capacitors
    • 100 nF high frequency decoupling capacitors
    • PLL filter components
    • Crystal
    • Current reservoir capacitors
  • ICs with exposed thermal paddles require extra attention during PCB design. A copper square matching the geometry of the exposed pad should be placed on all layers the PCB, with thermal vias connecting the layers in order to maximize heat transfer.

This FAQ was generated from the following discussion: in case of crash

  • noise
  • pcb
  • layout
  • sigmadsp
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