Q&A - Recent Threads

SigmaStudio+ Indirect Parameter Accees Table

op-electronics — Thu, 06 Aug 2026 16:58:08 GMT

In old SigmaStudio you could add a parameter to the IPAT with a simple mouse right-click.

Is there a similar feature in SigmaStudio+? I can only add it via the IPAT table but it gets annoying when the schematic is big and you have to browse hundreds of parameters.

left and right balance issues

Anmin — Tue, 21 Jul 2026 02:36:57 GMT

Dear members,
i want to know adau1401 how to created the left/right channel balance as pan function as below graphs, i tried below schematic, but no used, or we can use the volume table to find the lookup table to define the balance issues?thanks a lot.

adau1452 + cs42448 memory problem

Iajs — Tue, 14 Jul 2026 13:25:26 GMT

hello, i have a adau1452+cs42448 board that has been working wonderfully until now, recently it stopped "remembering" program with every power cycle. link compile download doesn't seem to do anything in sigmastudio, but after doing it, "Write latest compilation through dsp" works until it's turned off and on again. "check latest compilation through dsp" returns empty after every power cycle. the board always boots up blank with the faint rgb led, until i press f7 which makes the red led come back yet it still doesn't receive input signal, only after using "Write latest compilation through dsp", the level detectors detect signal

ADAU1452 + AD1938 Setting I/O problem

SigmaStudio — Tue, 07 Jul 2026 06:48:28 GMT

Hello, I bought a two-board set consisting of an ADAU1452 DSP and an AD1938 codec. I managed to get it up and running using a modified '192i2s.dspproj' test file. The sound quality is excellent.

In my schematic, I have one stereo input and one stereo output. The audio line comes into the Jack IN1 input, while IN2 is inactive. Based on the schematic layout, I expected only one output jack to be active. However, all four output jacks are playing the exact same line signal in parallel. It seems as if the processor is cloning that single output across all other channels.

How can I resolve this issue? Thank you

[ADAU1452] Internal PU/PD States During and After Reset

HTCV3 — Tue, 30 Jun 2026 01:30:06 GMT

Hi,

We have a question regarding the status of the internal pull-up/pull-down (PU/PD) resistors during and after reset for the ADAU1452.

Upon checking the ADAU1452 datasheet, we found a reference to internal pull resistors.
Please refer to "Table 26. Pin Function Descriptions" (Page 23).
Is the state of the internal pull-up/pull-down resistors the same during and after the reset?
If the state differs, please provide details.

Best regards.

Adding ADC channels wth TDM

markscohen — Mon, 29 Jun 2026 20:18:54 GMT

Following up on my previous threads. My goal is to add two channels of high quality ADC input to a configuration with the ADAU1701,

I have built and tested circuit boards using the following schematic:

The hardware basically works: the DSP downloads and runs programs, such as a simple four-channel function generator.

If I run the following simple program, using the configuration shown, I can see pass through signal from all channel except from channel two of my auxiliary ADC (channel 5 on the USBi). This is independent of the output DAC channel I have selected.

I have found no combination of configurations to the Serial Input that fixes this. However, if I switch the setting of the LRCLK polarity, I can see the output of channel 5 on the USBi, but not of channel 3. Thus, I imagine that this has to do with a problem in DSP frame reads for the TDM input.

I know from previous conversations that the TDM may not be integrated fully into this chip or the associated SigmaStudio code. However, if anyone can offer me guidance to use this input channel I would be very appreciative.

ADAU version that supports noise reduction

Artur82 — Tue, 23 Jun 2026 19:42:16 GMT

Hello everyone. I have a sealed plastic enclosure, 80 x 40 x 20 mm, with a 1.5 mm wall thickness, made of ABS plastic. I need to convert the front panel into a highly sensitive microphone. I used a piezoelectric disc, glued it to the inside surface, and assembled a three-stage charge-coupled amplifier. The sensitivity was decent, but any touching of the enclosure, light impact, etc., immediately drowns out the speech. I've come up with the idea of using a second sensor to remove structural noise and long-range subtraction of one signal from the other, leaving only speech. Which ADAUxxx model can I use for this? Technically, I need two analog inputs and an I2S-type digital bus to connect to the MCU. Thanks in advance for your reply.

Latency Details for Sigma DSP

dns — Thu, 28 May 2026 05:06:32 GMT

Dear Team,

For the Sigma DSP processor would like to understand the overall system sample delay in the following cases:

1. When receiving and transmitting audio data through the serial port.

2. When receiving audio data through the ASRC path(with input at 48 kHz and output at 192 kHz) from an S/PDIF input.

Could you please provide details on the expected sample delay (latency) for these cases, along with any factors that may influence it.

Thank you,

Best regards,
Chris Shirley

time dependencies in compressors

Kuba-s — Sat, 02 May 2026 11:08:37 GMT

Hi,

It's me again, and I have another question about compressors :-)
I'm trying to implement automatic gain control, including a noise gate, in a range of about 20 dB. So I used an RMS compressor block with a 4 dB/s attack time, 250 ms sustain, and 2 dB/s release. The curve looks like the one in the picture.
The circuit works well when the signal is within the 20 dB I want to compensate. Limiting the gain for no signal also works, but the time response isn't what I'd expect.
When the broadband test signal (pink noise) suddenly transitions from point A to point B, the compressor's automatic control does something like the one in the blue graph. I'd like it to do what I've drawn with the green line.

Is there a way to do this?

Thank you and best regards, Kuba.

SigmaStudio+ Sample rate propagation

sam@bbinet.com — Wed, 29 Apr 2026 03:42:39 GMT

I found out that the T-Connector would not propagate sample rate downstream. Remove the T-Connector and connect straight to the next block and the block's sample rate follows upstream. Does anyone have the same issue? Any suggestion how to fix this other than using Splitters?

Thanks.

Just new to Sigma Studio and am programming a Dayton Audio KABD250 amp. With the optional back panel kit, they include a power switch. I'd like to know where in the circuit it should be wired in to avoid pops and noises, etc. Should it be wired into th

OldSpeakerDude — Mon, 20 Apr 2026 06:19:59 GMT

I am programming a Dayton Audio KABD250 amp. With the optional back panel kit, they include a power switch. I'd like to know where in the circuit it should be wired in to avoid pops and noises, etc. Should it be wired into the board, the DC part of the power supply, or in the AC supply?

Issue with Compilation Optimization Option in Sigma Studio 4.7

pjs — Mon, 20 Apr 2026 06:05:05 GMT

Dear Support Team,

I encountered an issue with the compilation optimization option in Sigma Studio 4.7 and would like to seek your advice.

Here is the situation:

I am using a simple example (the project file is attached).

I enabled the optimization option: "Reduce the size of DM1 and DM0 download packets by removing zero initializations".

After the first compilation, the code size decreased from 942 (defined by BufferSize_IC_1 in defines.h) to 940.

However, without changing any settings, after recompiling and exporting the file again, the code size increased to 992.

Could you please explain why this happens? Does this affect the runtime behavior or functionality of the project? Is the optimization option unstable, or do caching or other configuration changes affect the second compilation result?

ez.analog.com/.../5554.test.dspproj

LARK STUDIO

veda16 — Wed, 15 Apr 2026 05:46:04 GMT

Is lark studio only works for programming of RAM??

does any functionality of QSPI test by the means of lark studio (if so can you share a project file)??

Can ADAU1861 can be selfbooted by the means of Lark studio??

what are register configuration that is needed to be done for Lark studio to program the QSPI flash????

Less Inst(cycles) in SS+ than in SS

Richardmy — Tue, 14 Apr 2026 11:44:16 GMT

My question is related to these two threads:
- ez.analog.com/.../how-to-set-sample-rate-in-ss-like-done-in-4-7
- ez.analog.com/.../setting-sample-rate

Preambule:

I migrated a project from SSv4.7 to SS+v3.3. I couldn't find a function to set the sample rate for the project. I searched the forums. I found the two threads listed above and found where this function is located in SS+. I also discovered that the sample rate is now set for each element separately, although some algorithms are locked to 48 kHz.

The question:

After compiling the project, I discovered that the Inst(cycles) fill percentage was significantly lower than the same project in SS: 35% < 93%.

As far as I understand, some algorithms simply don't require fs multiplication and operate from the base sample rate (please correct me if I'm wrong). The question is, is this an optimization in the new version of the program? Will the DSP output signal differ in a project compiled in SS+ from a project compiled in SS? Or is this simply a cool optimization, and I can now use many more algorithms in my project? Maybe I don't understand something…

Compile numbers

ElsaDog — Fri, 03 Apr 2026 20:11:04 GMT

I have a somewhat large program, and wanted to see if this complier message should cause any concern. The program compiled without error, and most specs on RAM and INST RAM seem comfortably under limits. But I do see 128% listed under INST Cycles. I am, however, running 4015 at 32 bit. The program downloaded fine and appears functional. Thanks!

Unconventional application of the ADAU1452 audio processor

asvlab — Tue, 31 Mar 2026 05:01:29 GMT

I used an audio processor in a non-standard way for a metal detector. I want to be able to select a project (program) that will be loaded into the ADAU1452 from EEPROM by pressing buttons connected to MP6 and MP7. Please advise on how to implement this.
youtu.be/mwJmQp8pjsM

Creating a New Project from an Existing One using SAVE AS

bklein — Mon, 30 Mar 2026 16:59:02 GMT

I have an existing project in its own dedicated folder.

I want to change some of the configuration and save as a new project to a new folder dedicated for it.

When I do a save as to the new location it only transfers the dspproj file and the Settings folder. It will refer to the original folder for a majority of things and I don't want that as I may want to delete or change the stuff in the original folder. If I do, the new project is forever corrupted (targeting files I deleted for example) and I have to start a NEW project and work from my memory of how things were set...

What's the trick?

Barry

SigmaStudio move to 192KHz from 48KHz

bklein — Fri, 27 Mar 2026 05:08:53 GMT

I've been asked to reconfigure our dev board to 192KHz from 48KHz. So I decided to start with the eval board first.

I asked AI for some help with this but it gave most of the registers different names and just added to my confusion. In SigmaStudio the PGA/ADC tab in Hardware Configuration has a Sample Rate section for ADC0/1 and ADC2/3 for 192KHz or 96 KHz. Also in the Output/Serial Port tab there is a Serial Port FS set to 48KHz or most any other desired rate. I'm left confused why 48KHz isn't an option in the PGA/ADC tab but is in the Serial Port FS tab, and why there are two areas to set... AI didn't cover using these; instead it ask for bit/byte setting with the Read/Write tab app.

Barry

Sigmastudio for Android devices

Kuba-s — Thu, 19 Mar 2026 13:30:15 GMT

Hi,

I apologize for asking this question here. I just don't know where to look.

Is there a programming environment similar to SigmaStudio where you can build an audio processing block and then run it on an Android device?

I know there's something called Android Studio and that you can write arbitrary code in C++. However, I'm looking for a graphical frontend that will free me from writing code.

Thanks.

multiple units in the same circuit

stagekraft — Sat, 14 Mar 2026 01:17:53 GMT

Hey Folks,

this may some crazy, but is there any reason I could not use multiple 1701's in the same project?

I picked up a handful of the little "tinysine tsa1700" project boards, I'm wanting to make a crossover with multiple time align outputs.

first unit handles a two-way crossover plus a sub out (with a delayed out)..

second takes the "hi" output and gives me four different delay outs..

third takes the "low" output and gives me four different delay outs..

Or something along those lines..

I don't see a way to combine all three into one sigmastudio project, so I'll make different projects, but is there any concern feeding the output of one card straight to the input of another?

JohnR

Active Noise Cancelling

Nicolas1312 — Thu, 12 Mar 2026 15:05:07 GMT

Hello

I am trying to build a ANC System for HVAC Installations with the ADAU 1467.

I rebuilt the secondary path using the FXLMS but somehow the System is not stable.

I tried to implement a feedforward system for better stabilization.

Does anyone know where the problem could be?

ez.analog.com/.../0310.260311_5F00_BAT-Versuch-Woche-4.dspproj

SPDIF TX configuration and timing problems between chained devices

MaxDelius — Wed, 11 Mar 2026 08:11:27 GMT

Hi Team,

I have a custom made DSP board for a loudspeaker based on the ADAU1466 and currently having a problem with my S/PDIF signal chain.
I run an ADC (@96khz) on SIDN1 through a ASRC2 into the DSP core (running @ 48khz) into a DAC on SDOUT0 (@96khz).
Additionally I route a SPDIF signal into ASRC3 into the core as alternative to the analog input. The switching between the signals is handled in the DSP code in a routing matrix.
This works fine for the first loudspeaker at any sample rate up to 192kHz. But I am struggling with the SPDIF TX signal in the second (and subsequent added speakers in the chain). 

There is two scenarios I tried, which both work with limitations.

  1) Routing the SPDIF TX to come from the DSP (F1C0 set to 0x0001): I have not problems receiving a signal (up to 192khz) on this speaker. In the DSP flow I take the signal from the ASRC3 inputs and split it to go both through the DSP processing (and then to the DAC and Amp) and directly to the spdif outputs (at DSP core rate 48khz) in the DSP code. This means the following speakers get a signal at 48kHz, which is fine for me.
This works BUT seems to create a timing offset problem between the two (and potentially subsequent) speakers in the chain. If I listen to music I can clearly hear a phase shift, which sounds like the first speaker is always louder. The speaker is not really louder, I verified that by measuring the amplitude on both, but there seems to be a comb filtering effect due to the processing delay.
If I send an SPDIF signal on my scope, route it into the speaker and back out, back to the DScope input, I measure a 252ppm difference, but I assume this just how much the reference clocks are apart of each other, right?  

2)Routing the SPDIF TX to come from the SPDIF RX (F1C0 set to 0x0002): This works too, BUT the signal integrity seems to degrade the more speakers are added. I can chain 3 speakers at 48khz and 2 speaker at 96 kHz and only 1 speaker at 192khz.  After that the speakers have dropouts and at some point i get no locking at all.

 What I want to understand:

In scenario 1: Where is this group delay between the two loudspeakers coming from? I assume the processing delay of the signal routed directly to the outputs and the delay of the signal going through the processing (filters, levels etc) is different. But shouldn’t this be compensated in each speaker since all the signals have to go through the processing at some point?  Can I compensate for this by delaying the signal somewhere?

 In scenario 2, how does the routing work? Is there any processing or is this simply a hardware switch routing the signal directly through the DSP without doing anything? Is the signal conditioned at the SPDIF output in some way?    

And one more question to the hardware RX input of the pdif. The input accepts both TTL signals and bipolar signals according to the datasheet. So a signal coming from a transceiver between 0V and 3.3V is no problem, right? Or does this signal also need to be AC coupled? Is there a setting for this or does the pin detect this automatically?  

I also attached a part of the schematic of in- and output. Everything works well when using the ASRC (exept of the delay), but maybe there is something that I am missing that builds up when chaining the devices?

Hope somebody can help with this, looking forward to your answers.

Best,
Max

Request for Review of ADAU1451 DSP Audio Architecture

PhongLT2 — Tue, 10 Mar 2026 10:59:45 GMT

Dear Analog Devices Support Team,

I would like to ask for your support in reviewing the audio architecture of our system using the ADAU1451 DSP.

System overview

Host processor: Rockchip CM3588
DSP: ADAU1451

Power amplifiers

4 × TAS2780
1 × TAS6421-Q1 (TAS6421QDKQRQ1)

Audio interface

The I2S output from the Rockchip CM3588 (SDO, LRCK, SCLK) is connected to the ADAU1451 I2S input:

SDO → SDATA_IN
LRCK → LRCLK_IN
SCLK → BCLK_IN

The I2S outputs of the ADAU1451 are connected to the power amplifiers as follows:

OUT3 → TAS6421-Q1
OUT2 → 1 × TAS2780
OUT1 → 1 × TAS2780
OUT0 → 2 × TAS2780

Could you please help review whether this I2S configuration and routing are appropriate for the ADAU1451?
If there are any recommended configurations or potential issues, we would greatly appreciate your advice.

The schematic diagram is attached.
Could you please help review it and provide your comments?

Thank you very much for your support.

ez.analog.com/.../Schematic-Connector-Board-10032026.pdf

Best regards,
Phong

Where is dither?

SoundConsulting — Mon, 09 Mar 2026 02:31:35 GMT

The Data Sheet section on Hardware Accelerators says "The core includes accelerators like division, square root, barrel shifters, Base 2 logarithm, Base 2 exponential, slew, and a pseudorandom number generator." ... "The pseudorandom number generator can efficiently produce white noise, pink noise, and dither."

Looking around, I see white noise and pink noise generators, but there is nothing that I can find for dither.

I seem to recall a thread here mentioning that dither is not implemented. If that's the case, are there plans from Analog Devices to add support for dither as hinted in the data sheet?

Brian

Boot ADAU1452 from ESP32 without EEPROM (RAM loader via I2C)

AndrzejGorzynski — Sun, 08 Mar 2026 22:11:36 GMT

Cześć,

udostępnić rozwiązanie rozwiązania uruchamiania konfiguracji ADAU1452 SigmaDSP bezpośrednio z konfiguracji ESP32 za pośrednictwem interfejsu I²C bez użycia pamięci Selfboot EEPROM .

W moim przypadku pamięć EEPROM na płycie ADAU1452 jest bezużyteczna z powodu dostępnego PCB, przez koprocesor DSP, który nie może się już automatycznie udostępniać. rozpocząć eksperyment z ładowaniem oprogramowania układowego SigmaStudio z wyjściem kontrolera.

Po kilku próbach udało się stworzyć moduł ładujący pamięć RAM przy użyciu modułu ESP32 WROOM , który ładuje oprogramowanie sprzętowe SigmaStudio bezpośrednio do pamięci ADAU1452 podczas uruchamiania.

Ładowarka następująca po zakończeniu:

Uruchomienie ESP32 
↓ 
Komunikacja I²C z ADAU1452 
↓ 
Zatrzymanie rdzenia DSP 
↓ 
Załadowanie pamięci PROGRAM 
↓ 
Załadowanie pamięci PARAM 
↓ 
Załadowanie pamięci DM 
↓ 
Konfiguracja adresu napędowego 
↓ 
Uruchomienie rdzenia DSP 
↓ 
Rozpoczęcie przetwarzania dźwięku

Oprogramowanie sprzętowe DSP eksportowane jest z SigmaStudio 4.7 przy użyciu:

Eksportuj pliki systemowe

Zastosowanie z technicznego powodu było prawidłowe adresowanie pamięci podczas zapisu oprogramowania sprzętowego przez I²C:

przestrzeń rejestrów używa adresowania bajtowego
Pamięć DSP wykorzystuje 32-bitowe adresowanie słów
Pamięć PROGRAMU musi być zapisywana po 4 bajty na raz z wydarzeniami

Jeśli nie jest to bezpieczne, DSP potwierdza zapisy na I²C, ale pamięć PROGRAMU jest niezabezpieczona, co skutkuje milczeniem DSP.

Po wdrożeniu prawidłowej logiki adresowania i czasu zapisu, ESP32 może teraz niezawodnie uruchomić ADAU1452 z pamięci RAM przy każdym uruchomieniu .

Pełny projekt (oprogramowanie układu ESP32 + dokumentacja) jest dostępny tutaj:

Repozytorium GitHub:

github.com/.../ESP32_ADAU1452_RAM_Loader

Użyty sprzęt:

ESP32 WROOM
Płyta DSP ADAU1452 z przetwornikiem cyfrowo-analogowym

Połączenie:

ESP32 GPIO21 → SDA 
ESP32 GPIO22 → SCL

To ewentualnie może być uzasadnione, gdy:

Pamięć EEPROM jest uszkodzona
wymagane jest ładowanie oprogramowania sprzętowego
Dostępność jest programowalnym kontrolerem DSP

Liczne problemy na tym forum pomogły mi zrozumieć architekturę ADAU1452, dlatego też zostały poniesione konsekwencje tego zdarzenia.

Pozdrawiam
Andrzej Górzyński