I'm a little confused with some of the ADAU1978 settings:
1) what is the MCLK frequency range? The timing specification offers only the table with specific MCLK values that can be used. But how much the MCLK frequency can vary between these values?
2) there's a field in register SAI_CTRL0 named FS which sets sampling rate. But MCLK input and MCS field in PLL_CONTROL register define sampling rate too. What is the difference between them and how do they relate to each other?
Actually, I've been playing with these three parameters (MCLK input frequency, FS field and MCS field) for a while, but failed to find the relation between them. For example, I've set MCLK input to 4,16 MHz and MCS to 128xfs, so I expect the LRCLK will run at 4,16/128 = 32,5KHz rate (in LRCLK/BCLK master mode). But it runs on 10, 20, 40, or 80 KHz depending on FS value (8 to 12, 16 to 24, 32 to 48 and 64 to 96 KHz respectively). I can't figure it out.
Hope, you guys will help me out with this. Thanks in advance.
I have moved this discussion to the SigmaDSP Processors and SigmaStudio Development Tool community.
Even I am going to use ADAU1978 audio codec. I have 3 MICs connected to 3 of the ADCs on the codec. I use I2C interface between the codec and STM3F407. What are the register settings that needs to be done?
Are you planning to use the ADC as master or slave? There are two options for the serial port and depending on the configuration the settings would change. Also what is the available master clock in the system and what is the sample rate you want to use for ADC . The ADAU1978 consist of PLL that needs master clock or LRCLK to operate. If you could provide us these details then will be able to provide you with settings.
I will be using the ADC as master. Also, I have a crystal of 12.288 Mhz which will be the master clock.Please help me with register settings.