About "external delay" in ADAU1452,how to use the module(SPI RAM delay )?
How about Setting the Master Control port Properties？
The "external SPI RAM delay" block for the ADAU1452 was developed/tested for the Microchip 23K256 SPI RAM. (see: http://ww1.microchip.com/downloads/en/DeviceDoc/22100D.pdf)
The SPI Master Port is limited 20 MHz and is limited to a 24bit address max, so approximately 16MByte.
The Master Control Port is used on system startup to communicate with 1 slave device (only), either a SPI flash or slave SPI device (like a codec). The Sequencer File is a text file which contains the SPI data words to be written to the device.
Unfortunately there is not any documentation on these blocks on the Wiki. We are looking to add that information in the coming weeks.
Really thanks for your reply.
Use SPI RAM will need Master Control Port? How to set up?
SPI RAM model we are using Microchip 23LC1024.
And my SPI RAM hardware schematics as follows:
What is wrong?
Any update on when the wiki updates will be available? I am planning to use this in my design and will have hardware in a couple weeks and could really use more specific info.
Also, the "Microchip 23K256" part you said this was tested for is only a 256 Kbit part, there is a bigger 1Mbit part; neither of which are near the 16MByte capability of the DSP. Is there a bigger serial SRAM that you can recommend?
I was hoping to get around 1-second of delay per channel on a design that has 4-channels with 96kHz Fs.
The DB in MA area?
JT is not longer with the company.
We did document the SPI RAM Delay a little better.
I think the next release might have a multi-tap delay or support more than one SPI RAM in hardware. There has been talk going around about it so we will see once the new release is out.
There are larger parts out there and I think others have tested it. I would have to research. Do a search on the forum and see what comes up.