ADAU1446 SPDIF recovered Clock as Master

Question

Hi 
 Is it possible you use the recovered clock from the SPDIF receiver to be the clock source for the SDATA and DSP Core 
 My Project uses external Codec IC as a slave that is connected to SDATA , and just one SPDIF I/O interface 
 So If I can Clock the Codec IC and The DSP from the Recovered SPDIF clock then I wont need SRC. 
 Is this Possible , I cannot see where to set the Clock domains to the SPDIF recovered clock. 
 Thanks 
 Brett

DaveThib · Accepted Answer

Hello Brett, 
 I have not tried this myself yet so I might have a detail missing but give this a go. 
 The DSP start pulse register is where you will tell it to get its clock rate from the SPDIF. See table 12 in the datasheet. It is Register 0xE220 and you will see setting 0b11011 is from the SPDIF. 
 So the clocks to the CODEC you can simply set to use the DSP rate and I am pretty sure it will follow it. 
 So give that a try and I think it should work. 
 The only issue you may run into is that when you lose SPDIF you will lose all your clocks. So the CODEC will lose its clocks and you may end up with DC on the output when it stops seeing clocks. You could have some clicks or pops. Try it and let me know what happens. 
 Dave T)

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ADAU1446 SPDIF recovered Clock as Master

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