Port0 (or Port1 out) be the clock master and Port1 input be a slave without physically wiring the clock pins between them — i.e. let the DSP sync internally?

Question

Hi 
 
 I am using below setup 
 
 - Serial Output port -1 as master 
 - LRCK_OUT1 & BCLK_OUT1 are connected to codec 
 - SDATA_OUT1 driving 2ch (I2s) data to codec (SDATA_OUT1 --> CODEC_DIN) 
 Now i am trying to read serial data from same codec (SDATA_IN1 <-- CODEC_DOUT) , how to achieve this without physically connecting LRCK_IN1 & BCLK_IN1 ? 
 means 
 can Port1-out be the clock master and Port1-input be a slave without physically wiring the clock pins between them &mdash; i.e. let the DSP sync internally? 
 or should I connect LRCK_OUT1 --> LRCK_IN1 & BCLK_OUT1-->BCLK_IN1 ? 
 
 regards 
 nagendra

Harishgowtham · Accepted Answer

Hello Nagendra, 
 Please note these below points too. 
 Since the DSP self-boot from the EEPROM (after a reset), the slave control port (J1) is back to its default config protocol, which is I2C, to put the slave control port to SPI, you have to toggle the SS line three times. 
 Please include this below snippet into your uC code and see if it works correctly, 
 
 Also, use either SPI mode0 or mode3 with the slave control port (J1). Only these two modes will be supported. 
 Regards, 
 Harish)

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Port0 (or Port1 out) be the clock master and Port1 input be a slave without physically wiring the clock pins between them — i.e. let the DSP sync internally?

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