SigmaDSP Serial Out Clock Sync?

Question

Hi, 
 I have an ADAU1452 with a 24.576MHz crystal on the XTAL pins generating a clock. A DAC is connected to the serial out ports and to MCLK Out. The DAC specifically states that BCLK must be synchronous with MCLK. 
 If I set 'BCLK is Master' and LRCLK is Master' in the serial out window, is this synchronous with the MCLK? The frequencies seem correct.

Thank you!

DaveThib · Accepted Answer

Hello ssashton, 
 Yes, the internal clocks are derived from the PLL output and that is locked to the MCLK input. So you should be fine and the DAC should be "happy" with the clocks and the number of cycles per frame. 
 Dave T)

Partner Forums

Partner Libraries

Products Mentioned

Thread Details

SigmaDSP Serial Out Clock Sync?