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LRCLK_IN2

Category: Hardware
Product Number: ADAU1467

Dear all

I use an ADAU1467 in combination with ESP32 via SPI. I use Serial Input Port 1 and Serial Input Port 2, both configured as masters. Serial Input Port 1 works perfectly. However, no LRCKL is generated at serial input port 2 (pin 82). Bclk is present.

Is there a configuration setting that I am overlooking or what could be the reason why no LRCKL is generated in master mode?

Thx in advance

Richard

  • Sorry, I have just found the problem. MP12 was not configured as an output. The strange thing is that MP11 is also not configured as an output but works fine as an LRCLK output.

  • Hello Richard,

    LRCLK_IN2 is multiplexed with GPIO12. Are using MP12 in your project? what is it set for? Is it in multipurpose mode or in primary mode?

    If you set the pin as MP pin, then the clock will go away but it doesn't affect the audio, the SDATA will be going out.

     Even if the LRCLK is set as a master in the SPORT configuration, SDATA should go out properly even if the LRCLK pin is configured to be a GPIO. The primary function of the pin is still a master even if that is “hidden” by the muxed function.

    Please attach your project, so that it will be easy for us to have a quick look.

    Regards,

    Harish