ADAU1772Production
The ADAU1772 is a codec with four inputs and two outputs that incorporates a digital processing engine to perform filtering, level control, signal level...
Datasheet ADAU1772 on Analog.com
The ADAU1772 has the option to use an internal regulator to generate DVDD. If this is chosen, then supplies should be provided to AVDD and IOVDD, and the REG_PD (Bit[2] of Register Address 0x0008) should be =0, so that the internal regulator is active. The REGOUT pin is then tied to DVDD, and a 10uF and 0.1uF decoupling capacitor is used for decoupling the DVDD.
If instead, you wish to use an external supply for DVDD, then the REG_PD should = 1, so that the internal regulator is disabled. Leave the REGOUT pin disconnected and connect the external supply to DVDD. The decoupling used should still be 10uF and 0.1uF on the DVDD supply.
The ADAU1772 has the option to use an internal regulator to generate DVDD. If this is chosen, then supplies should be provided to AVDD and IOVDD, and the REG_PD (Bit[2] of Register Address 0x0008) should be =0, so that the internal regulator is active. The REGOUT pin is then tied to DVDD, and a 10uF and 0.1uF decoupling capacitor is used for decoupling the DVDD.
If instead, you wish to use an external supply for DVDD, then the REG_PD should = 1, so that the internal regulator is disabled. Leave the REGOUT pin disconnected and connect the external supply to DVDD. The decoupling used should still be 10uF and 0.1uF on the DVDD supply.
