Product Number: adau1466 eval board
Software Version: 4.6
first, sorry for this google traduction... I have a circuit which has this particularity: the i2s signal is generated by a type 45 logic CMOS circuit. When the spdif signal is 44.1khz no problem. When the spdif signal is 96khz the sound is degraded (significant noise). When I set the BCLK signal to "negative polarity" in serial_ports configuration it solves the problem. I don't understand, on the oscilloscope the signal seems correct in both cases, despite that I arrive at the limits of my oscilloscope which is 10 MHz, the spdif being 6.14 MHz.
The rising edges seem a little noisy because I use a breadboard, but this noise is identical in 44.1 and in 96khz. If anyone has a start I thank them in advance. Thank you !