Hi ADI,
I have some confuse, as I know the class AB output dc bias approach to zero
Why HPOUT+ and HPOUT- have a half dc voltage of VDDHP
Hi ADI,
I have some confuse, as I know the class AB output dc bias approach to zero
Why HPOUT+ and HPOUT- have a half dc voltage of VDDHP
Hello MasterAudio,
Because the output circuits are class AB and will sit at AVDD/2 and it is not possible to put a large cap on the silicon die so it has to be done externally. The enables the output to swing positive and negative with respect to the CM ( common Mode) voltage level. These parts do not have a positive and negative power supply rails, only single ended power so therefore "0" signal level has to be midway of the power supply.
You can use the CM pin as a reference for an OpAmp circuit to amplify it without caps or the easiest and best way is to place a series cap to block the DC and allow for a simpler design of output amplifier.
In the case of headphones, it does not matter if it does not touch ground. It is still a good idea to use caps if it fits into your design budget.
Did I answer your question? Please feel free to share why this is a problem for you?
Dave T
BTW, Let me know which part you are looking at.