Post Go back to editing

ADAU1787 PLL Input Prescaler

Category: Software
Product Number: ADAU1787

When I change the input divider to the PLL (CLK_CTRL2 bits 2:0) between the values of 0 and 1 it doesn't seem to change the clock rate?For verifying clock rates I am monitoring the MCLKO pin.

If I am running in integer mode on the PLL with a input divider of 1 and the integer divider of 2 I expect to have the same PLL output as having an input divider of 2 and an integer divider of 4. The issue is that these 2 examples seem to provide different outputs. The datasheet isn't super verbose about the values for the prescaler so could it be that a value of 1 is invalid and 2 is actually divide by 2? Sigmastudio doesn't appear to think this is true but maybe it is also following the bad assumption that I also made?

  • Natan,

    Are you able to send your two SigmaStudio projects with the two sets of settings? Having the projects will help with debug.  Also what is the desired input clock and its' frequency?

    I am unsure if you are writing 0, 1 or 2 to the PLL_INPUT_PRESCALER.  But I agree that a prescale of 2 and multiplication of 4 should be equivalent to a prescale of 1 and multiplier of 2.  In these instances I would assume the input is 24.576MHz?  

    Note that per the datasheet, the input prescale calculation uses PLL_INPUT_PRESCALER + 1.  

  • I don't know if I really need to send 2 projects to show off what I am seeing here. If you just take the default ADAU1787 project and enable the clock out (I choose MP10). Then swap between a PLL_INPUT_PRESCALER value of 0,1 and 2 (hitting the update button after a change of course). You will see that a value of 0 and 1 gives the same clock output while a value of 2 gives a different output. Note my project is setup for SPI control in case you try to use it. I am using the normal ADAU1787 EVM with a clock of 24.576Mhz.

    ClkTest0.zip

  • Were you able to verify my findings?