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Interchangeability of ADAU1452/1451/1450 and ADAU1462/1466

Hello,

As said in ADAU1462/1466 datasheet, it seems to be compatible pin to pin and in registers to the ADAU1452/1451/1450. I would like to know if this is really true and (with a reduced signal process to perform that even the less powerfull of them can manage) maybe set all the list in a BOM so my assembler can fit the one they can find. I am asking this question because I have seen this unanswered thread [where ,  and   were discussing about it with no final answer] and I am trying to make my design easier to manufacture. I would like to confirm the interchangeability in terms also of programming, so I can fit a single program in any of them without noticinf from the outside.

Thanks in advance. BR,

Manuel



corrections and mentions
[edited by: ManuelGomezOptimus at 8:22 AM (GMT -4) on 29 Apr 2022]
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  • Here's what I can tell you: our program for the ADAU1452 works unmodified on the ADAU1462-300, and in general I would expect a high degree of compatibility across all the devices you mentioned, provided the runtime target has sufficient program memory and data memory for the needs of the program.

    An important caveat is that certain devices run at half the clock speed, specifically the ADAU1450, ADAU1462-150, and ADAU1463-150. I have no personal experience with these devices so I don't know what impact this has beyond the obvious reduction in number of clock cycles available per sample, though you've already found evidence that it affects clock configuration specifically when using external SPI.

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  • Here's what I can tell you: our program for the ADAU1452 works unmodified on the ADAU1462-300, and in general I would expect a high degree of compatibility across all the devices you mentioned, provided the runtime target has sufficient program memory and data memory for the needs of the program.

    An important caveat is that certain devices run at half the clock speed, specifically the ADAU1450, ADAU1462-150, and ADAU1463-150. I have no personal experience with these devices so I don't know what impact this has beyond the obvious reduction in number of clock cycles available per sample, though you've already found evidence that it affects clock configuration specifically when using external SPI.

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