latency in ADAU1772

Hello, i'm using AUAU1772 in my ANC project.

To measure system internal latency, i wrote a program in host(TI-C6748,McASP interface) which generate a digital sine signal and transfer it to 1772 using I2S, then 1772 transform it to analog form and play it.

A audio line connect DAC_OUT and ADC_IN so the signal can be caught and transform to digital signal and transform to host using I2S.

1772 was running at 192kHz ADC sample rate and the I2S interface was running at 96kHz。

However, I found that the latency between two sine signal is much more than i thought.

In my opinion, the latency shoud be 38us(analog to analog latency)+2*10.4us(I2S transform latency) + 10us(mcasp interrupt latency and data processing).But the test show me a 140us.

Could you plase help me find out what phase may have problem,or I have misunderstanding in latency calculation?

Thanks. 

  • Hello Linear Leaf,

    Figure 39 in the datasheet does show close to one of your test cases but the graph does not include the core. So add the 10.4us for the core and you get close to what you measured. The additional delay you are seeing is caused by the ASRC filters. 

    The ADAU1777 is capable of bypassing the sample rate converters but it is a bit tricky to setup and I don't think we detail it in the datasheet. The ADAU1787 is another part that is more flexible when it comes to the ASRCs. For the ADAU1772 there is no way to bypass them. It was designed for fast throughput from analog in through the core to analog out. The data coming into the serial port is meant to be data that is slower because it is things like Bluetooth or line level audio which low latency does not matter. The ease of communicated with the part at any sampling rate was far more important so that is why they are there. For an ANC application you only need to take the microphone feedback signals back into the core with a very low latency. not the incoming audio from some external source.  

    Dave T

  • Thank you for you reply.

    Now I understand that ASRC is the main cause of internal latency.

    Actually, I'm developing a program to reduce Rangehood's noise.

    I handle data on external DSP to have more flexibility and better performance.  

    I will discuss with hardware engineer later if it's nessary to replace 1772 with 1777.

    Would you pleasr show me how to setup ASRC for ADAU1777?ADAU1787 may be too expensive for us.

  • Hello 

    It could not be easier to do this. The ASRC clocks are setup to follow the clocks for the data source and destination that you setup in the Signal Routing page of the registers.

    On this page you select the routing of the data. You also must enable both of the ASRCs even if you are not using both. 

    Then on the Chip Control Tab, you must enable the power to the ASRCs. 

    They are all disabled by default. 

    Then setup the serial port as needed. If you have the serial port setup as a slave the ASRCs will simply follow the sampling rate of the incoming LRCLK. It requires no intervention by the user if sampling rates change. It will mute and relock to the new rate. 

    Dave T

  • Hi, we recently designed a new circuit board and replace 1772 with 1777. There are something confuse me in page "signal routing" .

    Since we bypass the ASRCs in both in and out direction,  should I disable both input/output ASRCs like your picture or enable them according to this?

    You also must enable both of the ASRCs even if you are not using both. 

    Besides, should I choose Input ASRC0/1 for DAC0/1 so I can put data from serial input port to DACs?

    Now I configure the chip like this :

    And another thing is that I find "fast rate" and "slow rate" in adau1777's datasheet but can't get info about them in both datasheet or on wiki. Would you please explain their function? 

    Thank you for your reply.

    Linearleaf

  • Emm, are you still there? Or I need to open a new question instead?