ADAU1467 Clocking issue


I have a setup with a ADAU1467 DSP feeding into 5 D/A converters with 4 channel each. The D/A converters expect TDM128 with bclk 512fs and negative bclk polarity (falling edge on falling edge) 32bit/channel and 32bits with i2s compatible output.

The ADAU1467 is driven by external MCLK with 44.576 MHz.

I experience 3 problems (maybe related to each other?):

- no matter what I select for serial output blck polarity it does not alter the signal. Falling edge of data is always on rising edge of blck

- I must set the clock gen1 to 6/7 for n and m; otherwise blck is too low frequency and D/A does not start

-if I use a sine tone generator in sigma dsp with e.g. 10kHz signal, the output on the D/A is 5kHz; alwas halfe!

I attached my project. Any ideas? Now trying for 2 days and about giving up...



  • News: I always tried using the usbi with compile&download. If I flash the settings and disconnect the usbi it outputs as expected! So with usbi attached some clock seems not to be working correct. Any idea to that? Usbi header has gnd provided. 

  • 0
    •  Analog Employees 
    on Jun 3, 2021 7:04 PM


    Is the MCLK frequency really 44.576 MHz? That would be well in excess of the maximum speed specified in the datasheet, and could explain all sorts of clocking issues.

    The serial output BCLK polarity switch does work on my evaluation board, which has a 12.288 MHz crystal. You can see it in these scope plots.

    Negative polarity:

    Positive polarity:

    Now, if the frequency is actually 24.576 MHz (which I have a feeling it may be, since .576 is usually seen following 24), this would be in spec and we could investigate the issues further.

    As far as I know, the only situation we've seen where the USBi affects serial data is when there is a ground loop in the system - do you think this could be the case in your setup?