I would like clarification on whether the the clock generator 3, sourced in my application from an external I2S LR clock (44.1k/48k/96k probably not 192k), can be used to generate the overall system clock for the DSP.
From my understanding of ADAU1452 data sheet on page 114 this should be possible also setting the internal sample rate by sourcing from external clock (from say LRCLK_IN3/MP13). This clock is also then x N/1024 to get the base sample rate used in the system.
However from looking at the clock generator description on pages 37 and 38 of the the data sheet it does not explicitly seem to mention this exact configuration for generating the system clock.
If this is possible understand that would need to mute etc during any change over but for my application am looking to do this to avoid using ASRC for best audio quality where sample rate from the I2S source is 'propagated' through the system?
Also, again if possible, can this be done on the EVAL-ADAU1452RevBZ in the default mode or would it need to have the modifications applied as per page 26 of the EVAL user guide to allow the on board codec to operate with the clocks sourced from clock gen 3?
Look forward to your reply.