I'm looking at the AN-923 application note, and the EVAL-ADAU1701MINIZ manual and I can see two different ways to connect WP pin between the DSP and EEPROM:
In the first option, WP can be set to high/low level, and in the second option, WP is (DSP wise) is always set to high and will always self boot.
Can someone please explain which option would be the better one?
What are the consideration taken when choosing one over the other?
The WP pin is an open collector output. So either method will work. One is a switch which is expensive and the first example you have shown only needs a 2-pin header which is low cost.
So the choice is really up to you and how you work and your application needs.
Just one more clarification please:
Regarding Self-boot operation, it is written that:
"self-boot operation is triggered on the rising edge of RESET when the SELFBOOT and WP pins are set high"
You wrote that WP pin is an open collector output, not an input...so why is the self-boot operation is dependent on WP logic state?
Does WP perhaps act as input right after a RESET rising edge?
By the way, looking at figure 2, the WP will always be low, no matter what...so how come this figure can even allow a "self-boot" operation?
Can someone please help me with this question?
This diagram is somewhat confusing and is really for a special case where you hook up a computer and disable the selfboot. This is usually not needed since all you have to do is have the computer wait until the selfboot is complete then communicate with the DSP.
The WP pin output circuits are an open collector output. There is also an input circuit reading the state of the pin. So the selfboot state machine looks at the WP pin state when booting up.
The open collector output is only activated and pulled low when the Writeback function is triggered. Then the DSP will pull down the WP pin on the EEPROM and write the contents of the interface registers.