How to Implement Single Input Connection with Various Sample Rates

Hi,

I have viewed the following thread :

https://ez.analog.com/dsp/sigmadsp/f/q-a/64255/adau1467-sample-rate-converter-problem

I have also been examining SigmaStudio and the blocks with parameters that can be set. The help file assists in some instances, but does not go into detail. Some blocks can have their sample rate set and others cannot.

The problem is that I wish to pursue a crossover project as per my other post, but the datasheet for the ADAU1467 and help files etc., does not provide the answers.

For the active crossover, there is a delay to be implemented for the low pass, and midrange signals to compensate for the differences in driver sound origin points. The delays can only be in multiples of milliseconds or samples.

The input to the active crossover will be a Toslink or Coaxial connection with receiver which outputs LRCLK, BCLK, and WCLK for stereo signals. So I will use the input stream as opposed to the SPDIF (which is not fully AES compliant as stated in the literature).

The input to the active crossover will be multiple dataword lengths (16bit, 24bit) and sample rates (44.1kHz, 48kHz, 96kHz, 192kHz).

Since delays are required and the input can be a multitude of data word lengths and sample rates, how do you achieve automated processing. That is :

  1. If the input data rates are varying, do I have to implement the ASRC block to convert any incoming data rate to the system sample rate which I will set to 192kHz or 384kHz ???
  2. Will the ASRC automatically detect the sample rate of the incoming data using the BCLK signal and convert {44.1/48/96/192k}kHz to {192/384}kHz depending on how I set the system sample rate ???
  3. Do I have to then set each delay for the requisite number of samples to achieve the relevant micro-second delays for each filter path ???
  4. Can I use the SPDIF connection on the ADAU1467 (does not seem to be in the SigmaStudio) and are the three previous points the same – I have to use an ASRC to convert to the system sample rate ???
  5. Is there any way of setting the processing to the incoming data stream sample rate (44.1/48/96/192k) without the ASRC such that there are multiple paths through the system. That is, for 44.1kHz there is one path with delay set to the relevant number of sample periods for 44.1kHz, and another path for 48kHz with the delay set accordingly, and so on ???, and the system automatically switches processing between the 4 paths (44.1, 48, 96, 192).

For a previous project I used the Cirrus CS8416 receiver – and could read the data registers to determine the sample rate of the connection. I could then use this information as required.

Is there any mechanism either to use the ADAU1467 internal registers to obtain this information with logic control in the DSP core to select specific paths as per item 5 above ???

Or would such logic only be possible with an external micro-controller interfacing to the DSP GPIO pins to select the relevant paths ???

Apologies for the long request – but I did not want to start down a specific design approach if the solution is not achievable.

Thanks and regards,

Richard.

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