I recently received our new digital audio board which is equipped with an ADAU1467. We have an external master clock signal running at 24.576MHz, 3.9V pk-pk. Verified that we have the master clock on pin 25. PLL_CTRL1 is set to 8.

I use SigmaStudio 4.2 to download a simple program (just input from port 0 and output on ch 0 and 1) to the chip but something is not correct:

Core Control window says that PLL has locked, but N and M values are 0 for CLK GEN 1 and 2. If I change the values and read them back from the DSP I get back only 0.

I can't change CLKOUT, always 0. On the EVAL board it was possible to turn CLKOUT on/off on the pin by restarting PLL_ENABLE.

Moreover, CORE_STATUS is 0.

I have checked all voltages, and RESET is high when the DSP is supposed to be running.

Does anyone have a suggestion for what might be wrong or what I should check?!


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