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Questions about ADAU1978 in SA mode

Hello I want to use the ADAU1978 in SA mode.

For this I connect:

1. SA_MODE to IOVDD (for standalone Hardware mode) .

2. ADDR0 to GND (for I2S mode)

3. ADDR1 to IOVDD (Slave mode). SigmaDSP processor will supply LRCLK and BCLK. PLL filter will be configured for LRCLK mode.

4. SDA to GND (MCLK = 256 × fS, PLL ON)

5. SDATAOUT2: will output ch3 and 4 as ADDR0 is connected to 0


1. Should MCLKI pin be left open or connected to GND?

2. Connection of SCL to 0 gives 48K sampling and 1 gives 96K sampling. Is 192K sampling not possible in SA mode? If yes, how do I connect SCL pin?


  • If using Standalone mode, the PLL will use MCLK pin for matser clock input. So you will need to provide either 256*fs or 384*fs master clock for the PLL to operate. The PLL loop filter will have to be set for MCLK mode.

    The Standalone mode offers only 48K/96K sample rate support. No 192K support.