ADAU1701 and TI digital AMP rattling noise with LP-filtered signal

Hey folks,

I´ve already done a project with the ADAU1452 and wanted to realize a small 4In4 DSP amplifer. Therefore I´ve moved to the ADAU1701 and a digital TDM input amp from TI TAS6424. I´m using the internal ADCs of the ADAU1701 and one 2-Ch exernal ADC via I²S, process them e.g. for a 3.1 (L/C/R/SUB) configuration and send the digital TDM stream to the TI chip. The ADAU1701 is Master for both input and output according to another thread here:

The settings of the hardware configuration window are:

The PCB is 2-layer 70um with SMD parts in which the bottom layer is alomst only GND. The feedback trace of LRCLK and BCLK output to the input is done directly whereas the connection to the external ADC and AMP contains 33R resistors. The traces are kept as short as possible. On the AMP side MCLK is hard-wired to BCLK (This is a possible operation mode for TDM when no MCLK signal is available according to the TI chip manual)

The first tests have been very promising but I´ve noticed two strange issues with channels that use LP filters in their signal flow:

  • The output at the amplifier itself seems to contain a high frequency/transient component that is audible similar to rattling although there is no other processing active. The level of the noise is relative to the input level and therefore always audible. Please refer the test signal flow below

I´ve bought the EVAL board of the TI amplifier chip to verify that the distortion does not come from the amp. With the EVAL board I don´t have these issues. Then I´ve tried to hook the ADAU1452 EVAL board TDM pins to the TI EVAL board and the transient noise was present again. I found out that when I use a buffer IC like 74HC125 between the DSP and the AMP the noise is gone. I´ve tried to verify with the oszi but I don´t understand why the buffered version is working as it should whereas the direct connection over a 33R resistor (I´ve also tried higher values and even ferrite beans) does "produce" the sound. I´ve already done another project that uses only the ADAU1701 and the TI TAS6424 without the I2S feedback traces and tesetd the same configuration with the same noisy result. The buffered CLK signals seem to have smaller fall/rise times but the raw CLKs look already good for me?

BCLK raw

BCLK buffered


LRCLK buffered


SDATA buffered



  • Any of the peak limiters (I´ve not tried the RMS yet) produces bad distortion at the output even at low levels. I´ve tried different attack, release paramters but they all distort the sound way before the actual threshold. I don´t know this behavior from the ADAU1452 and I know that the ADAU1701 is not that powerful and more cost-efective. However I assume that this should not be the normal behavior?

Any feedback is highly appreciated! Thanks in advance :-)

PS: I´m using SigmaStudio 4.5 Build 1779

    •  Analog Employees 
    on Aug 25, 2020 9:33 PM 7 months ago

    Hello campus,

    Thanks for the good post with lots of information. However, there may be more than one issue here so we have to peel back the layers and simplify. 

    First, you need to be using at least a four layer PCB. The internal layers needs to be ground and power. This serves several purposes. It does some shielding but it provides shorter and more defined paths for return currents. This can cause difficult to explain symptoms like why the noise goes away when a buffer is used. 

    I do see a fair amount of undershoot and overshoot but I have seen worse so I do not think that is the cause. 

    I think you need to simplify the program and see what happens. Bring in the signals only on the internal ADCs and use the internal DACs. Then in the DSP program only remove the DC from the ADCs, setup a meter, a volume control and a mute for individual channels. Then see what you get. 

    The meter is important because I am wondering if you hear noise then the meter is on. There is a chance you might be hearing SPI/I2C noise. 

    There are not any issues with the compressors or EQs. So it must be some other issues. Feel free to attach a project so I can look for possible causes.  

    Dave T

  • Hello Dave,

    Thank you for your helpful and fast reply! :-)

    You´re right, there seems to be a mixture of issues.

    Okay, I already thought about upgrading the design to 4-layers. This will definitively improve the whole performance.

    I´ve already done a project in the past with the ADAU1452 using a 4-layer PCB and multiple of these amplifier ICs and I can reproduce the "rattling" noise with this hardware as well. The signal flow only needs to have a LP-filter <200Hz for a subwoofer setting and feed some music has lots of transients. I did not find a right way to acutally measure the noise sound. Maybe you have an idea? The issue has never been a problem with this hardware because the configuration is for fullrange speakers and no subwoofers. The rattling gets masked and noone cares.

    I agree that the issues are probably related to the hardware and layout other than the DSP signal flow itself. We´ve been using a third design with the ADAU1452 and the 4In8Out audio codec similar to the EVAL board with analog amplifiers for few years now without problems although we´re using them for subwoofers and use the limiter extensively.

    Regards the compressor of the ADAU1701 however it seems that I can hear the transition between the limiter transfer function dots. For example, I´m using a peak, full range, no post gain, no ext detect and turn on the readback switch. The signal flow is like this, refer the project in attachment:

    Then I flatten the curve and watch my actual green dot (not visible in the picture) how the compressor works. Even at low levels where the limiter should not be active there is a distortion of the sound like artifacts and they sound like "rattling". When I restore the limiter transfer function to default the noise is gone.

    I made the suggested test with the following singal flow. I´ve extended the project a bit that the amplifier will be released from standby after a delayed startup. I assume that whis won´t affect the results. I can read -95dB when nothing is connected. This seems to be correct?

    Till now, I´m missing the right link between the software and hardware behaviour but I´m sure with you guys we´ll get it :-)

    Thank you and best regards!

    - C

  • Hello folks,

    I made few other tests and I think that the problems are highly related to CLK jitter. When I look at the oscillator output I can see the CLK signal walking although the trigger of the oscilloscope is set properly. I´ve tried few things to get a workaround with my current dual layer pcb but nothing has really helped:

    • I´ve tried to sieve the supply of the DSP with an external 33R resitor and 47uF ceramic cap
    • I´ve checked the PLL filter parameters. tested to swap the 470R against a 100nF (as recommended by another forum discussion)
    • tested another oscillator type (also 12.288MHz)
    • the external buffer IC workaround works for one test PCB. With another PCB assembly I cannot surpress the noise sound with the 74HC125
    • added small 15nF bypass caps on all supply pins

    I´ve gone throught the suggested layout best practices and made a 4-layer re-design. I hope that the problems have been now accounted but to be honest I´m not very confident because it´s more or less the same schematic. I´ve added lots of bypass caps and tried to isolate the oscillator section from the resuming signals but I´m sceptical that this will solve the problems.

    Any further tips on how to reduce the jitter would be higly appreciated. Thanks a lot!


  • Hi Dave,

    the 4-layer 70um PCB has arrived. However the same issues with the noisy sound exist as soon as any limiter is involved.

    I´ve tried various settings in Sigma Studio and everything leed me to the point that the limiter point density is too low in the upper range -20 to +6 dB. When I use the Peak Fullrange (no gain) algorithm and enable the tracking of the current level I can actually see the current level point jumping between the graph points. The jumping incident corresponds to the noisy sound.

    I´ve tried to increase the point density but nothing changes, maybe a bug?

    Any help is much appreciated.



  • I´ve done further tests with the board and can report the following:

    The noisefloor of the amplifier output changes randomly when I click multiple times on the same mute block. Please refer the attached video #1 and project #1.Click here to play this video

    I saw (and heard) that I have a dirty amplifier output, but the noise was controlable from the volume pot. When the volume pot was zero, then the noise was gone and constant. Therefore I further reduced the signal flow and have basically a audio through with mute blocks. At the time of the video, nothing has been connected to the input connectors. When I click repeatly on any but the same of the mute controls, the noise floor changes its value randomly. E.g. at one time I can read a higher noise floor level with the OSCI when everything is unmuted than when muted.

    The internal ADC inputs seems to be dirty when unconnected although the input ciruit has been further improved like shown in this thread:

    When the signal flow is extended with an index selectable filter (second order) there is a noticable difference in the noise shape. It´s not anymore white and activating a LP filter clearly adds more noise. Please refer the video #2 and project #2Click here to play this video

    I´ve also tested a simple second order biquad with the same results. Refer video #3 and project #3.

     Click here to play this video

    Could anybody please try to reproduce the described behaviour and shed some light into the dark?!

    Thank you!