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ADSP-21367-DMA FIFO Status

Hi I am using External port DMA for reading an arrray of data from SDRAM in ADSP-21367 processor.

I am not using External port DMA interrupt to check the DMA completion.

I am checking  only the EXTS bit

#define EXTS        (BIT_24)

    r0 = dm(DMAC0); 
    r1 = EXTS;                   // DMA External interface status check       
    r1 = r0 and r1;    
    if ne jump Wait_for_DMA_Complete;

Wait_until_FIFO_Empty :

    r0 = dm(DMAC0);

    r2 = fext r0 by 7:2;      // Check whether DFS bit is set/clr

    r2 = pass r2;       

    if ne jump Wait_until_FIFO_Empty;

whether the DFS  bit -DMA FIFO Status  also needs to be verified for empty status.

I am getting partially filled status and the code remains in the same loop.But in Memory window.

DMA seems to be completed.

Please suggest one solution for this?

  • Hi,

    In order to check the DMA using polling you need to use the DMAS bit and make sure that after you initiate the DMA, DMAS bit is cleared to confirm that the DMA is complete. And if you are using the transmit DMA, then you can confirm if the data transfer has happened at thew external interface by checking the EXTS bit in the DMACx register.

    Please also make sure that you flush the DMA FIFO before enabling the DMA. This will make sure that the DFS bit is cleared initially.  You may try this and see if this works for you.