I am working on ADSP-21364 & using the parallel port ,I read the example codes,wherein the eternal address was # defined now i am little confused with using the ALE ,RD & WR signals ,how do i use them in the code & if i would like to use the parallel port to interface with the FPGA how do i use these signals.Also i am not clear what does EMPP =0 do.Will this work for FPGA.
The examples are written for the EZ-kit. The address defines you see in the examples is to choose between the peripherals connected externally. The EZ-kit has a decoder that decodes the address bits (A21-A23) to select the different peripherals. You can find the address decoding table in the memory section of the EZ-kit manual at the following link. Since Address and data are multiplexed on this process two external 8-bit latches are used to decode the addresses where the ALE is used as the latch enable. You could use similar concept when connecting to FPGAs.
On the 21364 part, the external memory is accessed only via DMA. When EMPP = 0 the external memory location access is not incremented and you are accessing the same location pointed the EIPP addresslocation for all the accesses. The ECPP gives the count in 32 bit words. You can find the details of this in the parallel port chapter of the 21364 hardware reference manual.