Use ADSP-21469 SPORT Frame Sync for Miscellaneous Interrupt

Hi,

>>Question 1: Can I route the output of SPORT0_FS_O to 2 inputs as this?

>>SRU(SPORT0_FS_O, DAI_PB04_I);       /* DAI_P04 to SPORT0 FS (TFS0)   */
>>SRU(SPORT0_FS_O, MISCB1_I);          /* Frame1 (DAI_P04) to MISCB1   */

MISCB1 is not part of the SRU2 Group inputs. The SPORT0_FS_O is not a source to this input. The sources to this input come from the DPI pins and the timer. You could use SPORT0_FS_O signal to source MISCA inputs which is part of the SRU group E.

For details on the SRU group sources please refer to the hardware reference manual.

>>Question2: I enabled the Timer1 interrupt and the Misc DAIH interrupt, but only the Timer1 interrupt happens, not the Misc DAIH interrupt. Did I miss >>something in the setting?

Since the above routing is not valid you are seeing a Misc DAIH interrupt.

Hope this information helps in solving the issue.

Thanks,

Divya

Many thanks, Divya,

I realized I should have used MISCA and corrected it everywhere and rebuilt it. Please see attached main file.

Now the new question is, the QDAC_sport0_isr does get executed, but Frame Sync stays low for the whole Timer1 period (250us). I expected it to pulse 4 times (maybe 5 times) within one timer period, because I set the interrupt to latch on rising edge of Frame Sync. Did I miss something else?

RRC

Hi,

I breifly looked at the C file you sent. One thing I saw missing is that DAI interrupts require reading of the latch register to clear the interrupts. If this is not done there is a risk of generating the interrupts continuosly.

In your case in the DAI isr it is recommended to read the latch register as follows.

temp = *pDAI_IRPTL_H ;

Also the sequence of enabling the interrupts in the main function you do not need the following  system register bit set instructions. The interrupt functions in C take care of this.

/* enable IRQ interrupts and make DAI interrupts high priority */
sysreg_bit_set(sysreg_IMASK, (DAIHI) );

/* enable interrupt nesting */
sysreg_bit_set(sysreg_MODE1, (NESTM) );

/* enable global interrupts */
sysreg_bit_set(sysreg_MODE1, (IRPTEN) );

If the above doesn't work it would be worthwhile to check the FS output and the timer output on the scope and check if you see the expected FS pulses within the timer output pulse to further debug this.

Thanks,

Divya

Hi, Divya,

thanks again.

I think reading the latch register solved the problem.

I have done some other changes and the firmware is working as expected. I have verifyed the timer output and Frame Sync with a scope.

Really appreciate your timely reply.

Regards,

RRC