21161N External Port DMA issue

Hi,

I am facing a problem with External port DMA operation in 21161N. Occasionally this functionality End of DMA interrupt is generated before we receive the required number of samples from the external device.  External device shows it transferred less number of samples than the expected to DSP.  Customized board does not have provision to probe DMAR1 and DMAG1 signals. Can you please help to proceed further?

_InitDMA :

        entry;
        i4=_siBufferInDMA1;
        ustat1=0;
        bit set ustat1 HSHAKE | PMODE4 | FLSH | INT32;
        dm(DMAC11)=ustat1;
        dm(IIEP1)=i4;
        dm(EIEP1)=i4;
        r0=1;dm(IMEP1)=r0;
        r0 = dm(_iNbInput);
        dm(CEP1)=r0;
        dm(ECEP1)=r0;
        bit clr ustat1 FLSH ;
        bit set ustat1 DEN ;
        dm(DMAC11)=ustat1;

        r0 = dm(_siVirtWriteNb);
        r0 = pass r0;
        if eq jump EndInit;

        i4=_siBufferOutDMA1;
        ustat1=0;
        bit set ustat1 HSHAKE | TRAN | PMODE4 | FLSH |INT32;
        dm(DMAC12)=ustat1;
        dm(IIEP2)=i4;
        dm(EIEP2)=i4;
        r0=1;dm(IMEP2)=r0;
        r0 = dm(_siVirtWriteNb);
        dm(CEP2)=r0;
        dm(ECEP2)=r0;
        bit clr ustat1 FLSH ;
        bit set ustat1 DEN;
        dm(DMAC12)=ustat1;

EndInit:


_ReadBuffer:
        entry;
        puts=r0;

  r0=dm(_lReadDMACounter);
  r0=r0+1;
  dm(_lReadDMACounter)=r0;

        r0=i4;
        puts=r0;
        r0 = ustat1;
        puts=r0;
        r0=dm(_FlagIn);
        btst r0 by 0;
        if sz jump ReadDMA0;
        i4=_siBufferInDMA2;
        jump ReadDMA;

ReadDMA0: 
        i4=_siBufferInDMA1;

ReadDMA:
        ustat1=DM(DMAC11);
        bit clr ustat1 DEN;
        dm(DMAC11)=ustat1;
        dm(IIEP1)=i4;
        dm(EIEP1)=i4;
        r0 = dm(_iNbInput);
        dm(CEP1)=r0;
        dm(ECEP1)=r0;
        bit set ustat1 DEN ;
        dm(DMAC11)=ustat1;

        r0=get;
        ustat1=r0;
        r0=get;
        i4=r0;
        r0=get;
        exit;

  • 0
    •  Analog Employees 
    on Apr 20, 2011 7:30 AM

    Hi Sridevi,

              Please provide more details about the interface. And also send the complete project file which shows the problem. I had a quick look at the current code snippet. I could see that the DMA is disabled in the below portion of the code:

    ReadDMA0: 
            i4=_siBufferInDMA1;

    ReadDMA:
            ustat1=DM(DMAC11);
            bit clr ustat1 DEN;
            dm(DMAC11)=ustat1;

    You may add a code to check the FIFO status and make sure that the DMA is disabled only when the FIFO is empty. If this does not help provide me with more details of your application and the failure seen.

    Best Regards,

    Jeyanthi

  • Hi Jayanthi,

    Thanks for your reply. I will get back after testing this change. I would like to ask you one question, While this DMA transfer is in progress, If the DSP processor is delayed with HPI access, what will happen to DMA transfer?

  • 0
    •  Analog Employees 
    on Apr 25, 2011 8:04 AM

    Hi Sridevi,

                The DMA accesses will wait till the host completes the accesses. When the host requests for the bus, the processor will finish the current access and grants the bus to the host. The host will become the master and completes it accesses. After the host accesses are done, the DMA transfer will resume.

    Best Regards,

    Jeyanthi

  • Hi Jeyanthi,

    Thanks for your input. Our code in IRQ2 interrupt loop we have 2 long memory locations which might get updated depending on user request. When user makes this request, External port register reading is getting delayed.

    Interrupt duration is- 83us

    External DMA source reports a delay of 81us in taking the data. So in next 2us new data is updated to the device and one more interrupt occurs,

    interrupt routine takes 30us. I beleive the next interrupt is nested till i finish the old request,

    After some time external port buffer is ending up sending only 6 samples and last sample is not taken. I really wonder that this situation does not recover even after reboot.

    Interrupt configurations:

    interruptcb(SIG_IRQ2,SIG_IGN);
    interrupts(SIG_EP1I,SIG_IGN);
    interrupts(SIG_EP2I,SIG_IGN);

    I have attached the kernal that is used in the project.

    once again thanks for your support,

    -SriDevi

    161_host.asm.zip
  • 0
    •  Analog Employees 
    on Apr 27, 2011 8:48 PM

    Hi Sridevi,

              Please provide more details on what happens inside the IRQ2 interrupt. Do you access any external memory location inside the IRQ interrupt? How often this interrupt occurs? I also need more details about the application code flow on when the IRQ2 interrupt occurs and when DMA starts. If you can send the application code which shows the failure that will be good. The code you have sent only has the bootkernel source code. Regarding the booting problem we can debug that later.

    Best Regards,

    Jeyanthi