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Using an Emulator to defeat watchdog

Almost all the embedded designs I take credit for detect the presence of, or the operation of an emulator to defeat a watchdog circuit. Obviously when stepping through code, having the processor reset is not much help.
So, for the SHARC processors (ADSP-21065L & ADSP-21160N), the ICE TRST signal is used which goes high when the test port is active and the DSP core paused. Has anyone else done this, what has been your experience - or can you recommend a better way (by the way jumpers and switches or any miss configurable parts are not allowed).
Anyone know a down side to this, perhaps newer processor issues?

 

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  • Hi Stevie,

    I would like to get a clarification regarding your setup. While the emulqtor is being used the TRST line is -pulled high by the emulator. So how does that keep the watchdog in reset?

      I might not be able to answer if the JTAG timing will work with the watchdog. For more information on how to interface you might refer to the JTAG timing specification in the datasheet.

    Also please refer to EE-68, JTAG reference manual for more information , based on which the JTAG connection is implemented.

    Thanks

    Deepa

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  • Hi Stevie,

    I would like to get a clarification regarding your setup. While the emulqtor is being used the TRST line is -pulled high by the emulator. So how does that keep the watchdog in reset?

      I might not be able to answer if the JTAG timing will work with the watchdog. For more information on how to interface you might refer to the JTAG timing specification in the datasheet.

    Also please refer to EE-68, JTAG reference manual for more information , based on which the JTAG connection is implemented.

    Thanks

    Deepa

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