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ADSP-21489 EZ-Board - multiple src in tdm mode

Hi everybody,
i am using a ADSP-21489 EZ-Board. I took the C Block-Based Talkthru 48 kHz example and tried to integrate two sample rate conversions.
What I'd like to do:

- take 48 kHz samples from the 4 RCA jacks, decimate the sampling frequency to 8 kHz
- my existing software takes the 8 kHz samples, outputs samples with 16 kHz
- upsample those to 48 kHz, output to the 8 RCA jacks

I tried to use the SRC1 unit between the ADC and SPORT1 (Rx) and SRC0 between SPORT0 (Tx) and DAC, but sadly I wont get any output...

My SPORT control registers:


    //12.288 MHz SCLK from AD1939
    *pDIV1 = 0x05FF0000;
    *pDIV0 = 0x02FF0000;

    // sport1 control register set up as a receiver in MCM
    // externally generated SCLK1
    *pSPCTL1 =     SCHEN_A | SDEN_A | SLEN24 | IMFS;
   
    // sport0 control register set up as a transmitter in MCM */
    // sport0 control register, SPCTL0 = 0x000C01F0 */
    *pSPCTL0 =     SCHEN_A | SDEN_A | SPTRAN | SLEN24 | IMFS;

    // sport1 receive & sport0 transmit multichannel word enable registers
    *pSP1CS0 = 0x0000000F;    // Set to receive on channel 0-3 on SPORT1
    *pSP0CS0 = 0x000000FF;    // Set to transmit on channel 0-7 on SPORT0

    // sport1 & sport0 receive & transmit multichannel companding enable registers
    // no companding for our 4 RX and 8 TX active timeslots
    // no companding on SPORT1 receive
    // no companding on SPORT0 transmit
    *pMR1CCS0 = *pMT0CCS0 = 0;

    // SPORT 0&1  Miscellaneous Control Bits Registers
    // SP01MCTL = 0x000000E2,  Hold off on MCM enable, and number of TDM slots to 8 active channels
    // Multichannel Frame Delay=1, Number of Channels = 8, LB disabled
    *pSPMCTL0 = NCH7 | MFD1;
    *pSPMCTL1 = NCH7 | MFD1;

   
    // Enable multichannel operation (SPORT mode and DMA in standby and ready)
    *pSPMCTL0 |= MCEA;
    *pSPMCTL1 |= MCEA;


SRU Settings:

    SRU(DAI_PB07_O, SPORT1_CLK_I);   // DAIP17 (RSCLK1) to SPORT1 CLK (CLK)
    SRU(DAI_PB07_O, SPORT0_CLK_I);   // DAIP7 (RSCLK1) to SPORT0 CLK (CLK)

//--------------------------------------------------------------------------
// Route SPI signals to AD1939 Control Port.

    SRU(SPI_MOSI_O, DPI_PB01_I);     //Connect MOSI to DPI PB1.
    SRU(DPI_PB02_O, SPI_MISO_I);     //Connect DPI PB2 to MISO.
    SRU(SPI_CLK_O, DPI_PB03_I);      //Connect SPI CLK to DPI PB3.
    SRU(SPI_FLG0_O, DPI_PB04_I);     //Connect SPI FLAG0 to DPI PB4.
       
//---------------------------------------------------------------------------
// Tie pin buffer enable from SPI peipheral to determine whether they are
// inputs or outputs

    SRU(SPI_MOSI_PBEN_O, DPI_PBEN01_I);
    SRU(SPI_MISO_PBEN_O, DPI_PBEN02_I);
    SRU(SPI_CLK_PBEN_O, DPI_PBEN03_I);
    SRU(SPI_FLG0_PBEN_O, DPI_PBEN04_I);

//---------------------------------
// Connect SRC clock and framesync

    SRU(DAI_PB07_O, SRC1_CLK_IP_I);
    SRU(DAI_PB07_O, SRC0_CLK_OP_I);
   
    SRU(DAI_PB08_O, SRC1_FS_IP_I);
    SRU(DAI_PB08_O, SRC0_FS_OP_I);
   
    SRU(SPORT1_CLK_O, SRC1_CLK_OP_I);
    SRU(SPORT0_CLK_O, SRC0_CLK_IP_I);
   
    SRU(SPORT1_FS_O, SRC1_FS_OP_I);
    SRU(SPORT0_FS_O, SRC0_FS_IP_I);
   
//---------------------------------

//---------------------------------
// Connect SRC1 between ADC -> Sport1, SRC0 between Sport0 -> DAC
   
   
    SRU(DAI_PB05_O, SRC1_DAT_IP_I);            //DAIP5 (DR1PRI) to SRC1 input
    SRU(SRC1_DAT_OP_O, SPORT1_DA_I);    //SRC1 output to SPORT1 DA (RX)

    SRU(SPORT0_DA_O, SRC0_DAT_IP_I);

    SRU(HIGH, PBEN12_I);
    SRU(SRC0_DAT_OP_O, DAI_PB12_I);        //SRC0 output to SPORT0 DA (TX)

SRC Settings:


        *pSRCCTL0 =SRC0_SMODEIN1 | SRC0_SMODEOUT1 | SRC1_SMODEIN1 | SRC1_SMODEOUT1; // TDM In/out, 24bit

        // Enable SRC in a different cycle than setting the configuration
        *pSRCCTL0 |= SRC0_ENABLE | SRC1_ENABLE;


What am I missing?

Thanks in advance,

lyman

  • Hi Lyman,

                  In case you need to use the SRC in TDM mode you need to use additional signals. I have added an example code which uses 4 SRCs in TDM mode. You may use this as a reference and try to modify your code. If you can also send the complete project files, I will also look into your code.

    Best Regards,

    Jeyanthi

  • Hi Jeyanthi,

    thank you for your answer, but I still couldn't figure out how to deal with my problem. I think I did not get the idea of how to use and connect the SRC in TDM mode, and how to calculate the divisors for the framesync.

    My intended data stream:

    RCA-Input -> AD1939: 48 kHz -> SRC: to 8 kHz -> SPORT1 -> my audio operations: to 16 kHz (not included) -> SPORT0 -> SRC: to 48 kHz -> AD1939 -> RCA-Output

    I attached the relevant part of my code.

    Hope you/anyone can help me...

    Thanks,

    lyman

    Edit: It should (but doesn't) take samples from IN1 R, the output jack is OUT1 R. I'd like to expand it to  4 channels later on...

  • Hi Lyman,

               I had gone through your code and I understand what you are trying to do. I feel that there could be some limitation in the hardware. As you know each SRC has two channels, in multichannel mode four SRCs can be combined to get 8 TDM channels.  I could see that you are trying to use Two SRCs in the input end to get 4-channels of data and another two SRCs at the output end to send 4-channels of data in TDM mode. But from the CODEC end I could not see an option to get only 4-channels. I can see that the CODEC can send/receive only 8/16 channels of TDM data. The number of channels could not be less than 8. This can be the reason that your setup does not work.

    As for the frame sync calculation you need to follow the below relationship:

    SCLK = 256 X FS for 8-channels of data

    SCLK = 128 X FS for 4-channels of data

    In your current setup the SCLK will be always 256 x FS from the CODEC end. This cannot be changed. Hence I think you may need to use the four SRCs to convert all the 8-channels of data to a different sample rate. This can help only for either to convert the incoming data or the outgoing data not both simultaneously.

    Other option is to use the CODEC in I2S mode. Use the SRC 0 and 1 to convert the data from ASDATA 1 and ASDATA2 channels. The software can do further processing. The SRC 2 and 3 can be used in the output end and send the data back to DSDATA 1 and DSDATA 2 channels.

    Best Regards,

    Jeyanthi

  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin