I'm using an ADSP 21489 attached to the EZ extender, along with an ADV 7623 for HDMI input. Where can I find some sample code to get HDMI input into the ADSP 21489, and get analog out via the EZ Extender?
How are you interfacing ADV 7623 with SHARC ? If possible can you provide the block diagrams explaining the interface details of the ADV7622 with EZ-Extender and the SHARC processor.
We do not have example codes where SHARC takes the HDMI input from ADV7623 and give the audio signal output on the EZ-Extender .But we do have examples codes for SHARC Audio Ez-Extender which can be found in the VDSP installation directory : ..\Analog Devices\VisualDSP 5.0\214xx\Examples\SHARC Audio EZ-EXTENDER.
There is just one standard way of making that interface - The ADV7623 along with a HDMI adapter board is connected to the EZ Extender.
How exactly is *pCPSP4A related to SPORT 4A? If I have the address of a transfer control buffer in *pCPSP4A, how could I get the data in SPORT 4A to the transfer control buffer?
I’ll try to explain the use of TCB and the chain pointer register.
With chained DMA, the attributes of a specific DMA are stored in internal memory and are referred to as a Transfer Control Block or TCB. The location of the DMA parameters for the next sequence comes from the chain pointer register that points to the next set of DMA parameters stored in the processor’s internal memory. The processor automatically initializes and then begins another DMA transfer when the current DMA transfer is complete. Each new set of parameters is stored in a user-initialized memory buffer or TCB
Each SPORT DMA channel has a chain pointer register (CPSPxy). In chained DMA operations, the processor’s DMA controller automatically sets up another DMA transfer when the contents of the current buffer have been transmitted (or received). The chain pointer register (CPSPxy) functions as a pointer to the next set of buffer parameters stored in external or internal memory. The DMA controller automatically downloads these buffer parameters to set up the next DMA sequence.