I read that the FLAG10-15 signals can be routed through the DAI when the parallel port is enabled.
What happens when the parallel port is disabled and these flag signals are routed through the DAI?
What happens at 4. at the DAI pins the flags were routed to?
If I need additional GPIO pins which are not affected by PPFLAGS, can I just use DAI pins and assign HIGH or LOW to them?
Is there any problem with that? I don't see any.
Regarding “I read that the FLAG10-15 signals can be routed through the DAI when the parallel port is enabled.”
>> Can you provide details of the Pg.No and the manual that you are referring . As per my knowledge , the routing of the FLAG10-15 signals to the DAI pins is not affected by the Parallel port operation .
thanks for your response.
I stated it a bit wrong. What I wanted to say: When the parallel port is enabled, you can not use the FLAG signals on AD0-15 but can use some of the FLAG signals on the DAI pins.
My question is, if enabling/disabling the parallel port affects the behaviour of the FLAG signals at the DAI pins in any way.
Enabling/Disabling the Parallel port should not affect the behavior of FLAGS10-15 routed to DAI pins . Please let me know if you are facing any issues at your end .