Data bus through AMI (lower 8 bits acting differently than the upper 8 bits)

Hi,

We have connected a parallel digital to analog converter to the data bus and we are using the AMI to access it. Our AMI setup is as follows:

*pAMICTL3 = ( AMIEN | BW16 | PKDIS | WS5 | HC2 | AMIFLSH | PREDIS);

We have noticed that the lower 8 bits of the data bus act differently from the upper 8 bits. For example, when running the following code:

volatile short *DAC_Address_Signed = (short*)0x0C000008;

    for(i=0; i<65536; i++)

        DAC_Address_Signed[0] = i;

What we see is that D0 has a high frequency squarewave, D1 has a squarewave of half the frequency, D2 is half the frequency of D1, etc. all the way to D7. But these are always a sqaurewave. Starting with D8 all the way to D15, the waveform is no longer square. The bus seems to return to 0V in between accesses, so that it looks like a noisy mess. It does function, but it just seems like an awful lot of energy is being wasted by doing this.

Is there any way to make the D8 through D15 work like D0 through D7?

Thank you,

Marc

  • 0
    •  Analog Employees 
    on Oct 4, 2013 11:01 AM over 7 years ago

    Hi Marc,

    Can you tell us in which processor are you observing this behavior ?

    Also instead of using a ‘for’ loop can you write into the DAC_Address_Signed[0] sequentially with some alternate constant data point like 0x0000, 0xFFFF, 0x0000, 0xFFFF..so on.. as shown below:

    With above data, the toggling of all the data pins should be of same frequency.

    Kindly let us know what do you observe for above case.

    Thanks,

    Harshit

  • Hi Harshit,

    Thank you for your answer.

    We are using the ADSP-21489.

    The screen shot attached shows that the high-order 8-bits of the databus are bouncing between low and high in between the bus cycles. But the low-order 8-bits do not bounce at all and remain high forever.

    The code is as follows:

         while(true)

              DAC_Address_Signed[0] = -1;

    I would expect that all data lines would behave in the same way, but the high-order lines bounce while the low-order lines remain in their last state.

    Marc

  • 0
    •  Analog Employees 
    on Oct 24, 2013 4:14 PM over 7 years ago

    Hi Marc,

    I can still see that you are writing into the data bus using a while loop.

    I would suggest you to write into the memory address sequentially instead of using loops. This should show correct behavior of the pins.

    You can have code flow something like this :

    “DAC_Address_Signed[0] = -1;

    DAC_Address_Signed[0] = -1;

    DAC_Address_Signed[0] = -1;

    DAC_Address_Signed[0] = -1;

    DAC_Address_Signed[0] = -1;”

    Kindly upload a simple code with which you are able to replicate the issue in the EZ-Kit.

    Thanks,

    Harshit

  • 0
    •  Analog Employees 
    on Aug 2, 2018 2:28 PM over 2 years ago
    This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin