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ADSP21469 Timer0 PWM Mode Jitter

		
	
				

			

									
					    wrswrsnz
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Nov 10, 2013 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user encountered 1us period jitter on a 40kHz PWM output generated by Timer0 on the ADSP-21469 EZ-Kit lite when other interrupts were enabled. The hardware timer is supposed to auto-reload without software intervention, but the jitter increased with more active interrupts. The user found a workaround using the PCG for PWM generation, achieving low jitter, and eventually replaced the AD DSP with an FPGA and i5-4250u in an Intel NUC.
                        	    

                
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Hi,

 
I am using the code below to set up timer0 to create a PWM output with a fixed period and from time to time I change the width.

 
    

 
*pTM0CTL = 0;                                                             // Clear any old settings

 
*pTM0CTL = (TIMODEPWM | PULSE | PRDCNT );          // Set PWM mode, High output, Count to end of period

 
*pTM0CNT =    0x01;

 
*pTM0PRD =     PWM_Freq;                                         // Set to 40kHz

 
*pTM0W =     PWM_VCXO;                                          // Set default to 50% Duty

 
asm("NOP;");

 
asm("NOP;");

 
*pTM0STAT = (TIM0EN);

 
There are no interrupts enabled for timer0 and it simply auto reloads at the end of each period count.

 
When no other interrupts are enabled I get a very nice PWM output and can vary the width from 0-100% with no measurable jitter.

 
When other interrupts are enabled I'm getting up to 1us jitter on the period.

 
I'm creating approximately 40kHz PWM so 1us represents a large % of the period.

 
Since this is a free-running hardware timer with no interrupts required to reload it why is there  jitter when other interrupts are enabled.

 
I can understand interrupt latency causing jitter if software had to handle the interrupts for timer0 but there is none for this timer and it's supposed to be hardware based...

 
Is there some latency in the hardware reload that is interrupt dependant?

 
Is there another way to configure the timer to produce PWM jitter-free (well, low jitter within the spec of the device)?

 
I can't use the PWM outputs because this chip does have them or the ability to map to the DPI...

 
Thanks in advance.

			

			
									
		                             
                        
		


				
				        
        		

			
						
									
												
			
			
                        
                                    
                        
                        
                        
            
			            
									
						
			
			
			
			
		


        
        
        
    
					

			





















	

	

					



			








	
	
	
	



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                on Dec 15, 2013 8:35 AM
            
            
						
			            		
    
		
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    Hi Harshit,
    
 
    I've found a workaround for this problem.
    
 
    I'm using the PCG to generate PWM which it does nicely without any jitter.
    
 
    I never found out exactly why there was jitter on the Timer0 PWM output. If I set the system up so only Timer0 was running with no interrupts active there was no jitter. Once some interrupts were enable there was a small amount of jitter which increased as more interrupts were re-enabled. When all the Sport interrupts and Timer1 interrupts were enabled + all the FIR filters running the jitter on the PWM output pin was as high as 1us on a PWM period of 25uS so 4%. It was actually period jitter - the pulse width was always very accurate but the total 25us period could extend to 26us. It was as if the core had to reload the period count into Timer0 when it timed out - is this how it works?
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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                on Dec 15, 2013 8:35 AM
            
            
						
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi Harshit,
    
 
    I've found a workaround for this problem.
    
 
    I'm using the PCG to generate PWM which it does nicely without any jitter.
    
 
    I never found out exactly why there was jitter on the Timer0 PWM output. If I set the system up so only Timer0 was running with no interrupts active there was no jitter. Once some interrupts were enable there was a small amount of jitter which increased as more interrupts were re-enabled. When all the Sport interrupts and Timer1 interrupts were enabled + all the FIR filters running the jitter on the PWM output pin was as high as 1us on a PWM period of 25uS so 4%. It was actually period jitter - the pulse width was always very accurate but the total 25us period could extend to 26us. It was as if the core had to reload the period count into Timer0 when it timed out - is this how it works?
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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