Why is there such a long delay in Talkthru Analog In-Out?

Question

I started with the Talktru Analog In-Out example program using an ADZS-21369-EZLITE. I slightly rewrote the program so I could get data in and out of my program. When I ran the program I noticed about a 60 sample delay between the input and output. I assume the example program has the same delay. I finally reduced my interrupt routine to the program below. I took a sine wave and split it into RXSP0A and a scope and then took the signal from TXSP1B into the other channel of the scope. I find about a 1.3ms delay between the two scope waveforms. Is there someway to configure the SPORT to reduce this? Do I need to use DMA? Which manual applies to the 21369, the "2136x SHARC Processor Hardware Reference" manual doesn't include the 21369?

Hal

.section /pm seg_pmco;

.global _talkThroughISR;

_talkThroughISR:

HLoop: r14=r14 XOR r15;

if EQ JUMP HRight;

r10=dm(RXSP0A); // Read new left sample from ADC

r13=LSHIFT r10 BY 0x08;

f13=FLOAT r13;

dm(TXSP1B)=r10; //to scope channel

rti;

HRight:

r10=0;

dm(TXSP1B)=r10;

r10=dm(RXSP0A); //dummy read

rti;

///////////////////////////////////////////////////////////////////////////////////////////////

//NAME: main.asm //

//DATE: 7/29/05 //

//PURPOSE: ADSP-21369 EZ-KIT Test. Calls initialization routines then waits for interrupts //

// //

//USAGE: This file contains the main routine calls functions to set up the talkthrough //

// routine. It receives an input signal from the ADC via SPORT0A and outputs to //

// DAC's via SPORT1A, SPORT1B, SPORT2A, and SPORT2B. //

// //

///////////////////////////////////////////////////////////////////////////////////////////////

#include <def21369.h>

#include "btc.h" //BTC channel to observe variables

.section /pm seg_pmco;

.global _main;

.extern _initPLL;

.extern _initSDRAM;

.extern _initSRU;

.extern _initSPORT;

.extern _init1835viaSPI;

.extern _initMLS;

.extern _initFIR;

_main:

call _initPLL; // Initializes PLL for the correct core clock (CCLK) frequency

call _initSDRAM; // Initializes SDRAM for the correct SDRAM clock (SDCLK) frequency

call _initSRU; // Initializes the SRU & DAI/DPI pins

call _init1835viaSPI; // Initializes the codec

call _initMLS; // Initialize MLS sequence generator

call _initFIR; // Initialize FIR

call _initSPORT; // Initializes the transmit and receive serial ports (SPORTS)

//-----------------------------------------------------------------

// Enable interrupts (globally)

BIT SET MODE1 IRPTEN;

//----------------------------------------------------------------

// Unmask the SPORT0 ISR

LIRPTL = SP0IMSK;

_main.end:

//----------------------------------------------------------------

// Loop forever. Work is driven by interrupts

jump (pc,0);

init1835viaSPI.asm

#include <def21369.h>

#include "ad1835.h"

.global _init1835viaSPI;

//===============================================================

.section/dm seg_dmda;

.var spi_semaphore;

.var config_tx_buf[]= // Buffer of configuration data

WR | DACCTRL1 | DACI2S | DAC24BIT | DACFS48,

WR | DACCTRL2, // e.g.: | DACMUTE_R1 | DACMUTE_L2,

WR | DACVOL_L1 | DACVOL_MAX,

WR | DACVOL_R1 | DACVOL_MAX,

WR | DACVOL_L2 | DACVOL_MAX,

WR | DACVOL_R2 | DACVOL_MAX,

WR | DACVOL_L3 | DACVOL_MAX,

WR | DACVOL_R3 | DACVOL_MAX,

WR | DACVOL_L4 | DACVOL_MAX,

WR | DACVOL_R4 | DACVOL_MAX,

WR | ADCCTRL1 | ADCFS48,

WR | ADCCTRL2 | ADCI2S | ADC24BIT,

WR | ADCCTRL3 | IMCLKx2 | PEAKRDEN;

//===============================================================

.section/pm seg_pmco;

_init1835viaSPI:

//--------------------------

// Clear SPTFLG and SPICTL regs to start

r0 = 0;

dm(SPICTL)=r0;

dm(SPIFLG)=r0;

//---------------------------------------------------------

// Writing TXFLSH and RXFLSH bits in SPICTL clear the SPI

// transmit and receive FIFOs, respectively.

r0 = dm(SPICTL);

r1 = (TXFLSH | RXFLSH );

r0 = r0 OR r1;

dm(SPICTL)=r0;

//----------------------------

// Setup the baud rate to 500 KHz

r0 = 100;

dm(SPIBAUD) = r0;

//--------------------------------------------

// Set the SPIFLG register to FLAG3 (0xF708)

r0 = 0xF708;

dm(SPIFLG) = r0;

//------------------------------------------------------

// Now set the SPI control register

r0 = (SPIEN | // enable the port

SPIMS | // set SHARC as SPI master

MSBF | // send MSB first

WL16 | // word length = 16 bits

TIMOD1); // Initialize SPI port to begin

// transmitting when DMA is enabled

dm(SPICTL) = r0;

//-------------------------------------------

// Set up DAG registers to transmit via SPI

i4 = config_tx_buf;

m4 = 1;

//------------------------------

// Set up loop to transmit data

lcntr = LENGTH(config_tx_buf), do word_sent until lce;

// Send a word

r0=dm(i4,m4);

dm(TXSPI)=r0;

// Wait until "SPI transfer complete" status bit

// in SPISTAT (SPIFE) indicates that we can send more

do checkIfTXisDone until TF;

ustat3 = dm(SPISTAT);

BIT TST ustat3 SPIFE;

checkIfTXisDone:

nop;

// Wait an extra 100 cycles to meet the timing

// requirements of the AD1835A

lcntr = 100, do pauseFor1835 until lce;

pauseFor1835:

nop;

word_sent:

nop;

/*

//-----------------------------------------

// Flush SPI buffers after initialization

// You may want to do this before sending

// other SPI commands to guarantee that

// you have not accidentally left data in

// the transmit or receive FIFOs.

r0 = dm(SPICTL);

r1 = (TXFLSH | RXFLSH );

r0 = r0 OR r1;

dm(SPICTL)=r0;

*/

_init1835viaSPI.end:

rts;

////////////////////////////////////////////////////////////////////////////////////////////

//NAME: initSPORT.asm

//DATE: 7/29/05

//USAGE: This file initializes the transmit and receive serial ports (SPORTS). It uses

// uses SPORT0 to receive data from the ADC and transmits the data to the DAC's

// via SPORT1A, SPORT1B, SPORT2A and SPORT2B.

//

////////////////////////////////////////////////////////////////////////////////////////////

#include <def21369.h>

#include <Main.h>

.global _initSPORT;

.extern H;

.extern HCount;

.extern HiCount;

.extern HirCount;

.extern Mike;

.section/pm seg_pmco;

_initSPORT:

//============================================================

//

// Make sure that the multichannel mode registers are cleared

//

//============================================================

r0 = 0;

dm(SPMCTL0) = r0;

dm(SPMCTL1) = r0;

dm(SPMCTL2) = r0;

dm(SPCTL0) = r0;

dm(SPCTL1) = r0;

dm(SPCTL2) = r0;

//============================================================

//

// Configure SPORT 0 as a receiver (input from ADC)

//

// OPMODE = I2S mode

// SLEN24 = 24 bit of data in each 32-bit word

// SPEN_A = Enable data channel A

//

//------------------------------------------------------------

r0 = OPMODE | SLEN24 | SPEN_A;

dm(SPCTL0) = r0;

//============================================================

//

// Configure SPORTs 1 & 2 as transmitter (output to DACs 1-4)

//

// SPTRAN = Transmit on serial port

// OPMODE = I2S mode

// SLEN24 = 24 bit of data in each 32-bit word

// SPEN_A = Enable data channel A

// SPEN_B = Enable data channel B

//

//------------------------------------------------------------

r0 = SPTRAN | OPMODE | SLEN24 |SPEN_B ;

dm(SPCTL1) = r0;

dm(SPCTL2) = r0;

r14=0xFFFFFFFF;

r15=0xFFFFFFFF;

r3=22; //initialize shift of float conversion

r5=0; //adaptation modes

r1=HCountInit;

dm(HCount)=r1;

b0=Mike;

l0=MikeTaps;

m0=1;

b8=H;

l8=HTaps;

m8=1;

r1=HTaps;

f5=0;

r9=0; //initial mode

rts;

_initSPORT.end:

KJBob · Accepted Answer

Hello, 
 The latency is not from the SHARC or its programming, but from the on-board AD1835 Codec. The EZ-Kit board relies on this chip to get analog audio in and out. Generally these codecs have built-in decimation and interpolating filters to avoid aliasing at the ADC and reconstruct the output at the DAC. Their combined group delay adds up neatly to the 1.3 mS latency you observed:

Best regards, 
 Bob)

Partner Forums

Partner Libraries

Why is there such a long delay in Talkthru Analog In-Out?