My configurations are: Visual DSP++ 5.0, ADSP-21262SBBC-150 and ADZS-HPUSB-ICE.
The target board design has been confirmed with ADSP21262 EZ-KIT-Lite design reference and the appendix A in EE-68.
Question 1: Confirming with EE-175, ICE TEST was successful, but the JTAG frequency selection ‘Test’ couldn’t pass ‘Memory verification’.
Why?
Question 2: the CLK_CFG1:CLK_CFG0=1:0, which means CCLK:CLKIN = 8:1. When CLKIN is 10MHz or 13.3MHz, there are both ERROR
(0x80048008): Opcode scan: Do scan error.
JTAG scan failed-Check target power and emulator connection
DSP could not generate emulator interrupt
Why does this happen?
Question 3: BUT the target could be connected when CLKIN is 40MHz or 20MHz (also CCLK:CLKIN = 8:1)!
Why?
Question 4: Connect the target with 40MHz or 20MHz CLKIN(CCLK:CLKIN = 8:1), When I build any File, it’s OK. But when building the Project, there is always
‘Failed to set automatic breakpoint at ‘main’ ’!
Even building the ADSP21262 example in Visual DSP++ 5.0, there is the same error!
Why does this happen?
Please help me!
Thanks very much!
