ADSP-21478 SPI slave boot issues

Hi,

I am having some problems getting my ADSP-21478 SHARC processor to execute a boot kernel in SPI Slave boot mode.

Initially, I performed some tests using the standard 21479.asm boot kernel, but for debugging purposes I created a custom boot kernel which essentially contains a bunch of nops, an rti instruction at offset 0x8c030 (spi interrupt vector location) and some very basic code to toggle some FLAG pins. I have attached the kernel project as well as my program to this post for reference. The map file shows that the rti instruction is located at the correct memory location, which I later confirmed by viewing the ldr file (found in the program's "Release" directory) in a hex editor.

So far, all flag pins appear to be floating after the data has been transmitted, leading me to believe that either the boot kernel is not executed correctly or that the spi transmission is not successful.

A custom board on which a 16bit SPI master is being used to send the kernel data ensures that the BOOT_CFG pins are 00 and that CLK_CFG pin is 0. The screenshot of my logic analyser below confirms that the chip resets correctly and that the resetout signal is asserted after a short amount of time. It also shows the slave select line (DPI04) being pulled low prior to transmission. I then send the data in 16bit chunks to the DPI01, clock on DPI03.

Could somebody please confirm that the kernel I attached should normally work? I have attached a second screenshot below showing the transmission of the first few instructions over the SPI interface. Is the order of the words correct when crossreferencing with the ldr file, or am I transmitting them incorrectly?

Note that I have also tried toggling the slave select line between each 32 bit word and this does not seem to help either. I have also tried booting the standard kernel and placing my pin toggling instructions in the user_init label - same result. I am starting to run out of ideas and hope you can help me with this issue.

Kind regards,

Chris

projects.zip
  • Hi Chris,

    i had a similar problem with the ADSP21261. After some trial and error i set the select line for the first 384 bytes, which is the first part of the loader. The program itself is sent with select toggled after every 4 bytes. That works fine. Maybe you must adapt the length of the inital load.

    The SPI master is a 8-bit processor and the transfer is set to 8 bits.

    Regards, Kurt

  • Hi,

    Kurt - so do you keep the slave select low for the entire duration of boot kernel transmission or not? I'm confused about this because my boot kernel is 1536 bytes long.

    It is worth noting that I don't send the remaining data after the boot kernel, because as the moment I am only interested in the getting the boot kernel to execute properly.

    Could someone from AD please comment on the order of the 16bit chunks shown in my logic analyser screenshot? I need to be 100% sure that the data is sent in the correct order (when compared to the .ldr file I attached).

    Thanks,

    Chris

  • Hi Chris,

    it looks like the data is in the right place and right order from what I can tell. Five nops followed by a jump...

    In slave SPI you need to wait until the DSP signals its end of reset via RESETOUT, (which you do) before the external host lowers SPI_DS_I on pin DPI04 which you also do.

    Then it expects 384 32 bit words (or 768 16 bit words) to be clocked in for the boot loader (LSB first). The DS line needs to stay low for the whole time, looks like you do that as well. I don't think it needs to go up after that since it is the DMA completion interrupt that starts the boot loader via its interrupt vector.

    I could not find anything wrong in your code or the byte order (which does not mean that everything is correct ;-)

    Have you checked setup and hold times on the SPI bus to make sure the timing matches what the DSP's SPI is expecting? Also make sure the clock signal is clean when checked with a scope as any extra transition while DS is low will throw it off. Can you show a zoomed in logic analyzer trace to show the bit level timing?

    I'm assuming you tried this with the standard kernel and it also does not work, right?

    Klaus

  • 0
    •  Analog Employees 
    on Jun 4, 2015 2:45 PM

    Hi Chris,

    From the problem description I understand that host is sending the bootstream in as 16bit to another ADSP-21478 processor configured for SPI slave boot mode. For this case the SPI booting is not working. Can you confirm on this?

    To debug this you have been using a customized boot kernel.

    Can you also make sure that the SPI interface between the host and slave processor is correct or not. This can be done by transmitting some known amount of data from the host to slave guy and then do data check at the slave end if it received it correctly or not.

    Once this is done, then you can straightway send the boot stream generated with the default kernel.

    Please let me know if you have any further queries.

    Thanks,

    Harshit