Below is a table showing SHARC performance from Analog Devices website.
When I measured the number of cycles executing Talkthru_IIR_Accelerator example packaged in VDSP5.1, I got more cycles than cycles shown above. Total cycles measured is 31248. In the example, the number of biquads is 3 and data length is 512.
31248 / 512 = 60cycles. 60 / 3 biquads = 20 cycles. That is approximately 150ns. Much larger than described in tha table.
Could you explain why?
You can find some of the ADSP-21364 application code examples in the below link.
ADSP-2136x Application Code Examples
It contains multichannel SIMD IIR code examples for ADSP-21364 processor that you can be modified to run on ADSP-21489 processor.