Hi engineer,
I would like to ask you about start up clock frequency setting for ADSP-21486KSWZ-3AB.
Currently we mounted 25MHz Xtal connected with pin24 and pin25, and configed CLK_CFG[1:0] = "10" which is "16:1" setting.
In this case, start up clock frequency (25MHz x 16 = 400MHz) is upper than device's processor Instruction Rate (350MHz) max.
Is this CLK_CFG setting available for such a short start term?
Note : Of course we will downshift core clock rate after start up.
Thanks,
