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intermittent booting please help



		

			

									
					    diydsp
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Oct 11, 2015 
				
			
			
		
    

				
		
    
		    		    
		    
		    	
			
    Can someone please help me Im really stuck
    
 
    I built a ADSP-21261 custom board, the system seems to have successfully booted via from M2516 SPI flash (in master mode), however im finding a problem with intermittent booting,where the board doesn't successfully boot the system first time during power up, most of the time I have to power cycle the board quite a few times to get the board to boot correctly.
    
 
    Note: the program is very simple it just toggles Flag1 so no PLL software setup was used and the clock config is set to 3:1, this is obviously used to test the the boot sequence.
    
 
    I've read all most of the SHARCEE engineering docs referenced on the forum, so far I haven't found a solution or cause to why this is happening the docs does have alot of useful information which I have taken into consideration, but this problem seems unique.
    
 
    This experiences seems similar to post https://ez.analog.com/message/138620#138620 however im using a ADSP-21261
    
 
    Here is my setup
    
 
    1) I'm using CCES 1.0.3
    
 
    2) Here is my cldp command (which seems to work)
    
 
    cldp -proc ADSP-21262 -emu "ICE-100" -driver "C:\Users\admin\CrossCore Embedded Studio\examples\21262_ezkit_lite_1.0.0\M25P16_Flasher\Debug\M2516_Flasher.dxe"   -cmd prog -erase all -format hex -file "C:\Users\admin\CrossCore Embedded Studio\examples\21262_ezkit_lite_1.0.0\Core_Timer\Debug\Core_Timer.ldr"  -cmd compare  -format hex  -offset 0  -file "C:\Users\admin\CrossCore Embedded Studio\examples\21262_ezkit_lite_1.0.0\Core_Timer\Debug\Core_Timer.ldr"
    
 
    3) See attachment for my SHARC loader settings.
    
 
    4) I'm using the default kernel, I'm using the following CrossCore Embedded Studio 1.0.3\SHARC\ldr\26x_spi.dxe
    
 
    5) Find some attachments illustrating the problem
    
									
			        
		
    

				
							attachments.zip
							
        

    
    Tags: 
                                            
                 Audio Signal Processors
                
                                                    
                 adsp-21262
                
                                                    
                 SHARC Audio Processors/SoCs
                
                                                    
                 ADSP-21261
                
                                
            
    
    
    

		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    
















    
	
    
	
    
					



			








	
	
	
	



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                on Oct 12, 2015 11:00 PM
            
            
					
        
	
        

		
		
        
					
        A few things to look into:
        
 
        power up timing: there is a minimum delay required between the FLASH Vcc going into regulation and S# going low.
        
 
        This seems unlikely to be a problem in your case unless your supply is really flaky.
        
 
        There is also the power up timing of the processor itself, the requirements of which are described in the hardware reference manual.
        
 
        signal integrity: make sure that the FLASH does not see ringing or non-monotonic edges on its clock line. Does the layout follow transmission line rules? Are your supplies stable and well decoupled?
        
 
        When you zoom in on the first word, does the command always come out correct?
        
 
        What does the reset line to the SHARC look like and how are you generating it? What about the clock?
        
 
        Anything hanging off the JTAG pins?
        
 
        It looks like on a few attempts the processor does not load the 256 32 it words. Since this is a hardwired functionality the part either gets reset again during the boot or hangs for some other reasons.
        
 
        Klaus
        
			
        

		
			
	      

		
		
	
        
	
        
		
        
			
		
        
	
        
	
        
		
						
						
				
						
				
				
		
		
        
			
		
        
	
        

        

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													0
							
			
				
									
							        
			
			
			
          
            
						
                            
            
            				
            
                on Oct 12, 2015 11:00 PM
            
            
					
          
	
          

		
		
          
					
          A few things to look into:
          
 
          power up timing: there is a minimum delay required between the FLASH Vcc going into regulation and S# going low.
          
 
          This seems unlikely to be a problem in your case unless your supply is really flaky.
          
 
          There is also the power up timing of the processor itself, the requirements of which are described in the hardware reference manual.
          
 
          signal integrity: make sure that the FLASH does not see ringing or non-monotonic edges on its clock line. Does the layout follow transmission line rules? Are your supplies stable and well decoupled?
          
 
          When you zoom in on the first word, does the command always come out correct?
          
 
          What does the reset line to the SHARC look like and how are you generating it? What about the clock?
          
 
          Anything hanging off the JTAG pins?
          
 
          It looks like on a few attempts the processor does not load the 256 32 it words. Since this is a hardwired functionality the part either gets reset again during the boot or hangs for some other reasons.
          
 
          Klaus
          
			
          

		
			
	      

		
		
	
          
	
          
		
          
			
		
          
	
          
	
          
		
						
						
				
						
				
				
		
		
          
			
		
          
	
          

          

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