I can't find any information on the signal delay that the SPDIF receiver and transmitter introduce.
I assume that the transmitter does not generate signal latency at all, however the receiver should.
So, let's assume the following:
DSP 1 generates a master clock, outputs a signal via ADCs and passes this signal via SPDIF transmitter to DSP2
DSP2 uses the recovered clocks and outputs the received signal via ADC.
Currently, I measure a delay of 3.5 samples at 48 kHz between these 2 analog signals.
But there should be any official information about this, shouldn't it?