Customer ask some questions.
Right now we have plenty of software for ADSP-21489, but it’s quite hard to port it to ADSP-SC573 family. Code itself
is 99% C and C++.
Does family ADSP-SC573 have interface with external static memory like AMI for ADSP-21489? If not than how can we ensure
interaction with external static memory (RD, WE, CS, A, D)?
We have about 3-6 ADSP-21489 processors on the board. One of them is loading initializer program from
Flash memory, that is reading programs for other processors from Flash memory and loads them through
SPI-slave mode. After loading of satellites main processor is reloaded from the same Flash memory but already by
working program.
Can we organize a similar scheme with ADSP-SC573 board as master processor and ADSP-21573 as slave?
What if ADSP-21573 will be both master and slave?
Since processor has 2 or 3 cores more than one programmer will be working on software development. How is
ROM code merged(code polling)? Each core has its own loaded file or each time all codes are compiling? Is
there possibility to watch this process “ live”?
Now we need to store several programs for one processor in ROM. When system starts one of the
processors loads (in future - ARM core) and upon analysis of system configuration several additional
processors are loaded (in future - SHARC ADSP-SC573 core) from different ROM addresses. In this case how
can we organize loading of different programs for SHARC cores with the same program for ARM core?