Dear Team,
We are encountering an issue when working with the EV-SC594-SOM and DDR3 memory. After flashing a set of files containing coefficients, I am unable to see any values in the L3 buffer, which we are trying to copy from flash memory to L3 memory. Below are the DDR settings and SPI2 settings used for testing:
#define CFG0_REG_DDR_DLLCTLCFG 0x06f00622ul
#define CFG0_REG_DMC_MR2MR3 0x00180004ul
#define CFG0_REG_DMC_CTL_VALUE 0x00004a05ul
#define CFG0_REG_DMC_MRMR1 0x057000c0ul
#define CFG0_REG_DMC_TR0_VALUE 0x4140e646ul
#define CFG0_REG_DMC_TR1_VALUE 0x40680c30ul
#define CFG0_REG_DMC_TR2_VALUE 0x00330410ul
#define CFG0_REG_DMC_ZQCTL_0 0x00785A64ul
#define CFG0_REG_DMC_ZQCTL_1 0x00000000ul
#define CFG0_REG_DMC_ZQCTL_2 0x70000000ul
#define SPI_mode 0
#define SPI_CLK 62500000 //62.5 MHz
#define SPI_Baud_rate 1
Could you please provide the correct DDR settings and SPI settings that will allow the values from the flash memory to be successfully copied to the L3 buffer?
Thank you for your assistance.
Best regards,
Franky
Hi Franky,
We are currently checking on this and will get back to you soon.
In the meantime, could you please try changing the baud rate to a different value and confirm whether you are facing any issues.
Regards,
Nandini C
Dear Nandini,
Thank you for your feedback!
We changed the Baud rate to 11 and noticed that the flash memory successfully writes to L2 memory as expected. However, when the Baud rate is set to 1, we only observe zeros. Could you please let us know if there are any additional configurations we need to consider when setting the Baud rate to 1?
Regards
Hi Franky,
Have you had a chance to look at the "Memory-Mapped Programming Guidelines" section and "Table 21-10: SPI Control (SPI_CTL) Register" [Page No: 1195/3790] in the Hardware reference Manual. If not, please refer to following link,
https://www.analog.com/media/en/dsp-documentation/processor-manuals/adsp-2159x-sc591-592-594-hrm.pdf
Regards,
Nandini C
Hi Franky,
Have you had a chance to look at the "Memory-Mapped Programming Guidelines" section and "Table 21-10: SPI Control (SPI_CTL) Register" [Page No: 1195/3790] in the Hardware reference Manual. If not, please refer to following link,
https://www.analog.com/media/en/dsp-documentation/processor-manuals/adsp-2159x-sc591-592-594-hrm.pdf
Regards,
Nandini C
Dear Nandini,
Thank you for your feedback!
We would like to confirm if the following configurations are feasible:
We have reviewed the datasheets for both the EZKIT and the Flash Memory. The relevant details are provided in the image below.
Based on the documentation, SPI2 supports a maximum of 62.5 MHz (Baud Rate = 1), while the Flash Memory supports up to 133 MHz for Fast Read operations.
Hence can you explain why Setting Baud rate as 1 is too fast for the communication with Flash memory and does it exceed the maximum Clock Operating Conditions?? Please explain how ?
Could you also please provide an example code that demonstrates setting the Baud Rate to 1 and successfully reading data from the memory?
Regards
Franky
Hi Franky,
Regarding “We would like to confirm if the following configurations are feasible”
>>> Yes, this is feasible for both Fast mode and Normal mode.
In normal mode, the number of active edges is equal to the number of bits to be transmitted or received.
In Fast mode with a baud rate configured to 1 for reading from Flash memory offers advantages, as Fast mode behaves similarly to the normal mode during transmission. During reception, data is sampled at the next transmit edge, allowing for a full timing cycle in the receive direction. In Fast mode, the target device drives the data for a complete cycle.
Regarding “Hence can you explain why Setting Baud rate as 1 is too fast for the communication with Flash memory and does it exceed the maximum Clock Operating Conditions?? Please explain how?”
>>> No, it does not exceed the maximum clock operating conditions.
At this speed of 62.5 MHz, SPI2 will function correctly for reading from Flash memory. However, it will not achieve the 133 MHz speed supported by the Flash memory’s Fast Read operations.
The limitation is due to the DSP’s maximum SPI2 speed of 62.5 MHz, which becomes the upper limit for the Flash memory’s operating speed in this configuration.
The SPI_CLK.BAUD bits set the SPI baud rate according to the following formula:
BAUD = (CLKO6 / SPI Clock) – 1
In this case, CLK_06 is the system clock (SCLK0) at 125 MHz When we configure the baud rate as 1, the SPI clock is calculated as:
SPI Clock = CLKO6 / (BAUD + 1) = 62.5 MHz
Regarding “Could you also please provide an example code that demonstrates setting the Baud Rate to 1 and successfully reading data from the memory?”
>>> Can you confirm if the Breakout board is connected to your ADSP-SC594 SOM? If so, can you please disconnect it and verify if the issue persists?
There is a possibility that at times when the breakout board is connected, the trace length could potentially impact the SPI booting, particularly when the clock is configured for higher frequencies.
Regards,
Nandini C