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Failed to pump out SPORT data with clocks of PCG (external clock source)

Category: Software
Product Number: ADSP21565
Software Version: CCES2.10.1

We are developing a AMP product with  ADSP21565. According to the system design, the input source of 21565 is A2B TDM16, and the output sink signal is TDM8. So, we need to use PCG to do 2-division the input clock so that the output clock could be synchronized with that of the inputs. The main SRU connections are defined as below:

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//DAI0_PB03_I is as the input BCK clock from A2B

DAI1_CRS_PB03_O -->   PCG0_EXTCLKD_I    //external clock source of PCG comes in by crossing through DAI0 to DAI1 

PCG0_CLKD_O        -->   DAI1_PB06_I             //PCG BCK clock out

PCG0_FSD_O          -->   DAI1_PB05_I             //PCG FS clock out

DAI0_PB04_O          -->   DAI0_PB04_I              //input FS clock

 //DAI0_PB04_I  is as the input FS clock from A2B

DAI1_CRS_PB04_O -->   SPT4A_FS_I    //external FS coming by crossing through DAI0 to DAI1 is directly as the FS clock source of SPORT4A 

DAI1_CRS_PB03_O -->   SPT4A_CLK_I    //external BCK coming by crossing through DAI0 to DAI1 is directly as the BCK clock source of SPORT4A

SPT4A_D0_O            -->   DAI1_PB08_I             //DAI1_PB08_O is as the data output of SPORT4A

PCG0_CLKD_O        -->   SPT4B_CLK_I    // BCK clock from PCG is as the BCK clock source of SPORT4B

PCG0_FSD_O          -->   SPT4B_FS_I    // FS clock from PCG is as the FS clock source of SPORT4B

SPT4B_D0_O            -->   DAI1_PB09_I             //DAI1_PB09_O is as the data output of SPORT4B

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The PCG configuration is as picture below:

With the SRU configuration above, we can see data pumped out from SPORT4A (which is clocked by external clock pair of BCK & FS), but we failed to catch any data pumped out from SPORT4B (which is clocked by PCG outputs). The input BCK & FS we caught is as picture below:

The BCK & FS coming out of PCG was caught as picture below:

As we can see above, the differences between SPORT4A and SPORT4B are as below:

1. SPORT4A is with TDM16, while SPORT4B is with TDM8;

2. SPORT4A is clocked by the input clock pair directly; while SPORT4B is clocked by the PCG clock outputs.

I don't think TDM16 or TDM8 configuration could cause the fail of SPORT4B as long as the configuration of SPORT4B could match the sequence of its clock inputs(BCK & FS out of PCG).

Could you tell me why we can not drive the SPORT data out by PCG clock? 

Thank you!

Edit Notes

modify a typo: DAI0_PB04_O --> DAI0_PB04_I //input BCK clock ==>DAI0_PB04_O --> DAI0_PB04_I //input FS clock
[edited by: humorhxu at 5:19 AM (GMT -4) on 28 Oct 2024]
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  • Hi,

    To assist you better could please share us the below details:

    1. Since clock and Fs format is different in input and output side due to different TDM formats, you have to use ASRC to sync up. Please confirm ASRC is used in your application.
    2. Share us the simple block diagram of your application.
    3. Are you able to get data from SPORT4B when TDM8 is configured on both input and output side.

    Regards,
    Nandini C

  • Hello, NandiniC!

         My answer is as following:

    1. For the ASRC, I think we don't need it because the data of Sport4A and Sport4B are driven out with clocks that are based with the same clock source. 

    2. my block diagram could be summarized as below:

    3. Do you mean configuring PCG_D as passing through mode? Yes, I ever tried that and it can not drive the sport data out, too. It seems that the sports can not work properly as long as it is driven with PCG.

    And I would like to report the latest progress to you. Now the Sport can be driven with my PCG. But I did not change any codes, except configure all unused DAI pins as input low. Could you tell me why?

    Thank you!

  • Hi,

    Thanks for sharing the block diagram. With that we understand, ASRC is not required for your system. As per HRM, the unused PORT/DAI pin does not go to floating state.

    Regardless of the system design, it is good practice to tie all unused inputs to a high or low level to reduce dynamic power consumption.

    Please let us know if assistance required.

    Regards,
    Nandini C