The data that appears in SPORT is different from the internal data.

Hi,

To assist you better on this issue, please provide your commments on below points.

    1. Could you please explain your appplication in detail with block diagram?
    2. Can you please share the values of SPORT control and status registers?
    3. What is bit clock and frame sync rate used for data transmission?
    4. Are you facing any errors or exceptions?

Also please refer the below FAQ which contains example code for ADSP-21489.
ez.analog.com/.../adsp-21489-sport-example-for-tdm-mode
 
Regards,
Divya.P

Hi.

This question has come up.

  I am using DMA to move files.
  Do I have to stop the next DMA until the file has been moved?

1:The signal flow looks like this.

The problem is that the actual value input to D/ACONVERTER is different from the value of FILE MOVE-2 in DSP.

2:SET_SPORT3:
b7=STP3a_cp;
r15=STP3a_ii; r14=0xFFFFF; r15=r15 and r14; dm(i7,1)=r15; // Chainning Next Set Address Chaining
r15=data_W; dm(i7,1)=r15; // Internal Number of words
r15=1; dm(i7,1)=r15; // Internal Address Increment
r15=tx3a_C; dm(i7,1)=r15; // Internal Starting Address Index
b7=STP3b_cp;
r15=STP3b_ii; r14=0xFFFFF; r15=r15 and r14; dm(i7,1)=r15; // Chainning Next Set Address Chaining
r15=data_W; dm(i7,1)=r15; // Internal Number of words
r15=1; dm(i7,1)=r15; // Internal Address Increment
r15=tx3b_D; dm(i7,1)=r15; // Internal Starting Address Index
rts;
GO_SPORT3:
r15=0; dm(SPCTL3)=r15; // disable Serial PORT3 DMA
ustat1 = OPMODE| //I2S mode enable ('1')
SPTRAN| //Transmit on enabled channels
SLEN32| //32-bit word length
/// L_FIRST| //I2S transmit left channel first ('1') 
SPEN_A| //Enable Channel A
SDEN_A| //Enable Channel A DMA
SCHEN_A| //Enable Channel A DMA Chaining
SPEN_B| //Enable Channel B
SDEN_B| //Enable Channel B DMA
SCHEN_B; //Enable Channel B DMA Chaining
dm(SPCTL3)=ustat1; // Enable Serial PORT3 DMA Start
r15=STP3a_ii; dm(CPSP3A)=r15;
r15=STP3b_ii; dm(CPSP3B)=r15;
// bit set IMASK SP3I; //SPORT3 Interrupt Mask
rts;

3:All are the same from 44k to 192k.

4:No errors or exceptions

Thanks & Best Regards,

YAMAMOTO

Hi.

This question has come up.

  I am using DMA to move files.
  Do I have to stop the next DMA until the file has been moved?

1:The signal flow looks like this.

The problem is that the actual value input to D/ACONVERTER is different from the value of FILE MOVE-2 in DSP.

2:SET_SPORT3:
b7=STP3a_cp;
r15=STP3a_ii; r14=0xFFFFF; r15=r15 and r14; dm(i7,1)=r15; // Chainning Next Set Address Chaining
r15=data_W; dm(i7,1)=r15; // Internal Number of words
r15=1; dm(i7,1)=r15; // Internal Address Increment
r15=tx3a_C; dm(i7,1)=r15; // Internal Starting Address Index
b7=STP3b_cp;
r15=STP3b_ii; r14=0xFFFFF; r15=r15 and r14; dm(i7,1)=r15; // Chainning Next Set Address Chaining
r15=data_W; dm(i7,1)=r15; // Internal Number of words
r15=1; dm(i7,1)=r15; // Internal Address Increment
r15=tx3b_D; dm(i7,1)=r15; // Internal Starting Address Index
rts;
GO_SPORT3:
r15=0; dm(SPCTL3)=r15; // disable Serial PORT3 DMA
ustat1 = OPMODE| //I2S mode enable ('1')
SPTRAN| //Transmit on enabled channels
SLEN32| //32-bit word length
/// L_FIRST| //I2S transmit left channel first ('1') 
SPEN_A| //Enable Channel A
SDEN_A| //Enable Channel A DMA
SCHEN_A| //Enable Channel A DMA Chaining
SPEN_B| //Enable Channel B
SDEN_B| //Enable Channel B DMA
SCHEN_B; //Enable Channel B DMA Chaining
dm(SPCTL3)=ustat1; // Enable Serial PORT3 DMA Start
r15=STP3a_ii; dm(CPSP3A)=r15;
r15=STP3b_ii; dm(CPSP3B)=r15;
// bit set IMASK SP3I; //SPORT3 Interrupt Mask
rts;

3:All are the same from 44k to 192k.

4:No errors or exceptions

Thanks & Best Regards,

YAMAMOTO

Hi Yamato,

The location of the DMA parameters for the next sequence comes from the chain pointer register that points to the next set of DMA parameters

stored in the processor’s internal memory. In chained DMA operations, the processor automatically initializes and then begins another DMA transfer when the current DMA transfer is complete.

Could you please share us the DAC part and its configurations.

Regards,
Divya.P

Hi.

I believe this is not a DAC problem, but a DMA problem.
As you can see in the picture, the top two waveforms are distorted.
However, the data inside the DSP is the same for all four.
The data sent out by the DMA does not match the internal data.
I have not been able to solve the problem because I do not know why this is happening.
Question.
Is it possible to send DMA 3 and 5 in sequence without using a chain?

Thanks, & Best Regards,

YAMAMOTO

Hi Yamamato,
 

For further analysis, Could you please share the simple project that replicates the issue.

Regards,
Divya.P

Hi.

'Could you please share the simple project that replicates the issue.'

What should I do?

What should I tell you?
　Programs?

Thanks & Best regards,

YAMAMOTO

Hi Yamamoto,

Our sincere apologies for the delay.

Please find the attached code, which is configured with SPORT 1 as receiver and SPORT 3&5 as transmitter with 4 channels provided as input in chained DMA. We have tested this in 21469 Ez-kit. Please modify this and try this code in your end and let me know the results.
1.AD1939_I2S_Sampled_Based_Talkthru_Sport3_5.zip
Regards,
Divya.P