read and write to SHARC ADSP-21569 from a micro controller

Hi,

We would suggest you to refer the SPI example code available in the board support package which demonstrates transfer of data in DMA mode between different SPI's. You may refer to this for better understanding.

BSP can be download from the below link:
download.analog.com/.../ADI_ADSP-2156x_EZ-KIT-Rel1.0.1.exe

After installation, example available in the below path:
<Installation path>:\Analog Devices\ADSP-2156x_EZ-KIT-Rel1.0.1\ADSP-2156x_EZ-KIT\Examples\drivers\spi\

Regards,
Divya.P

Hi,

We would suggest you to refer the SPI example code available in the board support package which demonstrates transfer of data in DMA mode between different SPI's. You may refer to this for better understanding.

BSP can be download from the below link:
download.analog.com/.../ADI_ADSP-2156x_EZ-KIT-Rel1.0.1.exe

After installation, example available in the below path:
<Installation path>:\Analog Devices\ADSP-2156x_EZ-KIT-Rel1.0.1\ADSP-2156x_EZ-KIT\Examples\drivers\spi\

Regards,
Divya.P

Hi i tried the SPIDMAmode example project, I'm now trying to transfer bytes to and from DSP,  i'm sending few bytes of data over spi and I'm able to read (receive) the correct data in the dsp in the DestData buffer, but when i try to transfer data from the dsp to the microcontroller, i'm only reading 0xFFs on the micro side, I'm not reading the SrcData buffer data in the micro controller. should i be utilizing the SPI_RDY flag to read from dsp?

Hi,

we understand with the same ADSP-21569, you can transmit and receive the data successfully. However, when try to transfer data from the dsp to the microcontroller, you couldn't able to read the data properly in the microcontroller. Please confirm whether our understanding is correct.

Please ensure the clock polarity(SPI_CTL.CPOL) and the clock phase(SPI_CTL.CPHA) could be identical for the master device and the slave device involved in the communication link. Enable receiver first for synchronization.

In master mode, the SPI_RDY pin acts as an input signal. In slave mode, the SPI_RDY pin acts as an output signal. If SPI_RDY is deasserted in the middle of a transfer, the current transfer continues, and the next transfer will not start unless the slave asserts the SPI_RDY
signal.  This RDY signal used to pause the HOST to not transfer the data.

For simple SPI transfers you can try without RDY signal.

We recommend to refer “Transfer Protocol” under Chapter 15 in HRM for more details:
www.analog.com/.../adsp-2156x_hwr.pdf

Regards,
Divya.P