How to identify GPIO to corresponding SPORTs

Hi,

If you are using 21489 Ez-kit, Please find the following Input and output combinations

 J4 bottom row RCA connectors - ADC IN 1 Left/Right Channels
              - J4 middle row RCA connectors - DAC OUT 1 Left/Right Channel
              - J5 middle row RCA connectors - DAC OUT 2 Left/Right Channels

 J5 bottom row RCA connectors - ADC IN 2 Left/Right Channels
                  - J4 top row RCA connectors - DAC OUT 3 Left/Right Channels
                  - J5 top row RCA connectors - DAC OUT 4 Left/Right Channels
                  - Headphone jack (H)
Also, we suggest  you to Refer the "Readme" of the I2S C Sample based talkthrough for switch config and overview on the code,which is available in Visual DSP folder. Please navigate by the below path
C:\Program Files (x86)\Analog Devices\VisualDSP 5.1.2\214xx\Examples\ADSP-21489 EZ-Board\21489 AD1939 I2S C Sampled-Based Talkthru\readme.txt

Also refer initSRU.c file, which provide detailed information about Codec ADC/DAC Routing. Like how the clock, Fs, data lines from AD1939 connected to SPORT using DAI pins.    

Regards,
Divya.P

Thanks for the reply.

I am trying to connect my I2S female/female input cables to the board, I am assuming I can use the Expansion Interface II Comnector.

But how can I identify the different pins on the board.

Thanks.

Hi,

Are you asking about DAI pins connected to SPORT, from the SRU diagram in "initSRU.c" were you get an image representation of  DAI pins and SPORT connections.
SPORT0 and SPORT1 Clock input <----  DAI_PB07 (PIN 18) in P2 connector.
SPORT0 and SPORT1 FS  input <----- DAI_PB08 (Pin 20) in P2 connector.
SPORT0_DA_O ---> DAI_PB12 (Pin 47) in P2 connector.
SPORT1_DA_I <---- DAI_PB05 (Pin 42) in P2 connector.

Please refer the 21489 Ezkit schematics to know about pin connections.
www.analog.com/.../ADSP-21489_ezboard_man_rev.1.1.pdf

Hope this helps you, please let us know for further assistance with detailed requirements of issue.

Regards,
Divya.P

Hi,

Thank you for your help. Unfortunately, the demo does not seem to work. I've linked the different Inputs to their positions, but the only thing I am getting is noise as an output.

Are there some parameters that I need to change in the demo code?

Also, is it possible to access the content of the different SPORTs in CCES? For example, the pins used in the I2S talkthrough.

Thanks.

To be more specific, I am working with this HDMI to I2S extractor : https://aliexpress.com/item/32906617504.html

It outputs the three I2S signals :

LRCLK, BCLK, SDATA.

Thanks to an Oscilloscope, I found that LRCLK is a 47.998 KHz signal, and BCLK is a 12.38 MHz signal.

So i coupled the LRCLK to (Pin 20) FS input, BCLK to (PIN 18) Clock input, and SDATA to (Pin 42). Although DAI_PB05 corresponds to ASDATA1 which is PIN 14 in the Ezkit schematics.

Plus, I dont know what (SPORT0_DA_O ---> DAI_PB12 (Pin 47) in P2 connector) is used for.

Regards.

Hi,

Apologies for the delay in response,

We checked the same code with our ADSP-21489 Ez-kit and observed the expected audio output without noise.

Are you using Ezkit or custom board. Let us know how you generated LRCLK as 47.998 KHz signal, and BCLK as 12.38 MHz signal.
If you are using Ezkit, please refer the "readme" file in I2S C sample-based talkthrough and confirm whether the switch settings are properly configured as in readme.

If the input clock and out clock differs, you can use ASRC to convert the sample rate 47.998 KHz to 48Khz. You supply them with an output clock and input clocks and it will change the input rate to match the output clock rate. If it slightly drifts it will follow it. If it changes drastically then it will recalculate and relock. For more details about ASRC please refer chapter 13 in below linked HRM:
www.analog.com/.../ADSP-214xx_hwr_rev1.1.pdf

Refer the below example in VDSP installation path which utilizes ASRC
Installation Path:Program Files (x86)\Analog Devices\VisualDSP 5.1.2\214xx\Examples\ADSP-21489 EZ-Board\SPDIF to Analog TalkThru with SRC (C)

Regarding, I dont know what (SPORT0_DA_O ---> DAI_PB12 (Pin 47) in P2 connector) is used for.
>>> SPORT0_DA_O Data out is connected to DAI_PB12 which is DSDATA1 pin of AD1939. You can know more about this in "init.SRU" file and refer the 21489 Ezkit schematics page 96 for DSDATA1 connections.

Regards,
Divya.P

Thanks for the reply.

My current situation is I can hear the audio output, but it still contains noise, I think it's because the the sample rate is not exactly 48k.

"You supply them with an output clock and input clocks and it will change the input rate to match the output clock rate"

I am having some troubles figuring this out. Can you please guide me thorough it step by step.

Thanks.

I tried this after looking through the demo "SPDIF TALKTHROUGH", unfortunately it didn't work.

SRU(DIR_CLK_O,SRC1_CLK_IP_I);

SRU(DIR_FS_O,SRC1_FS_IP_I);

SRU(DAI_PB05_O,SRC1_DAT_IP_I); //dataIn

SRU(DAI_PB07_O,SRC1_CLK_OP_I); //ClkIn

SRU(DAI_PB08_O,SRC1_FS_OP_I);//FSIn

SRU(SRC1_DAT_OP_O, SPORT1_DA_I); //DataOut

I am not sure if I should use this instead ?

SRU(PCG0_CLKB_O, SRC1_CLK_OP_I );

SRU(PCG0_FSB_O,SRC1_FS_OP_I);

Hi,

To assist you further please let us know your application. Also, Can please share us the probe sensing image of LR clk, Bclk in DAC OP end and in the Output side.
Is the default SPDIF audio passthrough SRC code available in visual DSP path is working for you, with recommended switch settings?

Regards,
Divya.P

Hi,

To assist you further please let us know your application. Also, Can please share us the probe sensing image of LR clk, Bclk in DAC OP end and in the Output side.
Is the default SPDIF audio passthrough SRC code available in visual DSP path is working for you, with recommended switch settings?

Regards,
Divya.P