ADSP INTERNAL RAM TEST

Hi,

You will find the files you are looking for in the" ...\VisualDSP 5.1.2\214xx\lib\src\crt_src" directory.
You might also find it helpful to have a read through the section "Working With Library Source Code", which can be in VisualDSP help path mentioned below:
Run-Time Library Manual for SHARC® Processors > 2 DSP Run-Time Library > DSP Run-Time Library Guide > Working With Library Source Code

Regards,
Anand Selvaraj.

the manual said " To modify these files, you need proficiency in ADSP-21xxx assembly language......",   where can i get the  "ADSP-21xxx assembly language" manual .  I think this  manula will help me .

thanks a lot.

Hi,

Please refer the below link for VisualDSP Assembler and Preprocessor Manual
www.analog.com/.../50_asm_mn_rev_3.4.pdf

Refer the below link for VisualDSP C/C++ Compiler Manual for SHARC Processors
www.analog.com/.../50_21k_cc_mn_rev_1.5.pdf

Regards,
Anand Selvaraj.

   I already download the manual above.

    I am quite new to assemble.    the manual only have the "SHARC Processor Assembler Keywords ",Is there any more particular manual about the Keywords.

   for example the "DM(I7,M7)"  ,I have no idea for the use of "DM".

   best regards.

Hi,

The DSP’s Data Address Generators (DAGs) generate addresses for data moves to and from Data Memory (DM) and Program Memory (PM).

Index registers (I0–I7 for DAG1 and I8–I15 for DAG2):  An index register holds an address and acts as a pointer to memory. For example, the DAG interprets DM(I0,0) and PM(I8,0) syntax in an instruction as addresses.

Modify registers (M0–M7 for DAG1 and M8–M15 for DAG2: A modify register provides the increment or step size by which an index register is pre- or post-modified during a register move. For example, the DM(I0,M1) instruction directs the DAG to output the address in register I0 then modify the contents of I0 using the M1 register.

We recommend to refer chapter 6(DATA ADDRESS GENERATORS) and chapter 9(INSTRUCTION SET TYPES) in the programming reference manual linked below:
www.analog.com/.../adsp-2136x_2137x_214xx_pgr_rev2.4.pdf

Regards,
Anand Selvaraj.

Hi,

The DSP’s Data Address Generators (DAGs) generate addresses for data moves to and from Data Memory (DM) and Program Memory (PM).

Index registers (I0–I7 for DAG1 and I8–I15 for DAG2):  An index register holds an address and acts as a pointer to memory. For example, the DAG interprets DM(I0,0) and PM(I8,0) syntax in an instruction as addresses.

Modify registers (M0–M7 for DAG1 and M8–M15 for DAG2: A modify register provides the increment or step size by which an index register is pre- or post-modified during a register move. For example, the DM(I0,M1) instruction directs the DAG to output the address in register I0 then modify the contents of I0 using the M1 register.

We recommend to refer chapter 6(DATA ADDRESS GENERATORS) and chapter 9(INSTRUCTION SET TYPES) in the programming reference manual linked below:
www.analog.com/.../adsp-2136x_2137x_214xx_pgr_rev2.4.pdf

Regards,
Anand Selvaraj.