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What causes interrupt latency jitter?

I am using the ADSP-21488. At the beginning of an ISR (in my case the PWM-period-expired or the core-timer) I set a flag and reset it at the end. Using a scope I trigger on one rising edge and zoom in on the next one. I find that there is a jitter of 110 ns in 10 ns increments. 

What causes this jitter and how can it be reduced?

I am using interrupts() to set up the interrupts.

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  • Hi Anand - thank you for your response.

    The first reference is interesting but also disappointing because the question was not answered by Analog Devices and the user removed the ADSP from his design.

    The second reference deals with the latency caused by the dispatcher but not with the jitter - which is the variation of the latency. Is it conceivable that the interrupt dispatcher has execution times that vary as much as 110 ns in increments of 10 ns?

    In the third reference the user was happy to report that he reduced the jitter to "only" 100 ns. His finish point is my starting point. I want to know what causes a jitter in this time range? Or precisely: I want to know why disabling a lower priority interrupt reduces it to 30 ns. 

    The fourth reference deals with the time taken up by various dispatchers. I am OK with the time taken up by the dispatcher. I don't want any variation thereof. 

    Is there some kind of design flaw in the ADSP-21488 that causes interrupt latency jitter even on the highest priority interrupt?

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