I have tested the EE-387: Associated Zip File. I wonder why EE387\ADSP-SC57x\DDR3_Init\DDR3_Init_Core1\src\DMCInit.h defines the following register pointers?
#define pREG_DMC0_PHY_CTL3 (int*)0x3107100C #define pREG_DMC0_CPHY_CTL (int*)0x310701C0
The registers are already defined in ADSP_SC573_cdef.h and ADSP_SC573.h.
Am I missing something here?
